Datasheet MAX78000 (Analog Devices)

FabricanteAnalog Devices
DescripciónArtificial Intelligence Microcontroller with Ultra-Low-Power Convolutional Neural Network Accelerator
Páginas / Página47 / 1 — here. MAX78000. Artificial Intelligence Microcontroller with Ultra-. …
Formato / tamaño de archivoPDF / 416 Kb
Idioma del documentoInglés

here. MAX78000. Artificial Intelligence Microcontroller with Ultra-. Low-Power Convolutional Neural Network. Accelerator

Datasheet MAX78000 Analog Devices

Línea de modelo para esta hoja de datos

Versión de texto del documento

link to page 46 Click
here
to ask about the production status of specific part numbers.
MAX78000 Artificial Intelligence Microcontroller with Ultra- Low-Power Convolutional Neural Network Accelerator General Description Benefits and Features
Artificial intelligence (AI) requires extreme computational ● Dual Core Ultra-Low-Power Microcontroller horsepower, but Maxim is cutting the power cord from • Arm Cortex-M4 Processor with FPU up to 100MHz AI insights. The MAX78000 is a new breed of AI mi- • 512KB Flash and 128KB SRAM crocontroller built to enable neural networks to execute • Optimized Performance with 16KB Instruction at ultra-low power and live at the edge of the IoT. This Cache product combines the most energy-efficient AI processing • Optional Error Correction Code (ECC-SEC-DED) with Maxim's proven ultra-low power microcontrollers. Our for SRAM hardware-based convolutional neural network (CNN) ac- • 32-Bit RISC-V Coprocessor up to 60MHz celerator enables battery-powered applications to execute • Up to 52 General-Purpose I/O Pins AI inferences while spending only microjoules of energy. • 12-Bit Parallel Camera Interface The MAX78000 is an advanced system-on-chip featuring • One I2S Master/Slave for Digital Audio Interface an Arm® Cortex®-M4 with FPU CPU for efficient system ● Neural Network Accelerator control with an ultra-low-power deep neural network accel- • Highly Optimized for Deep Convolutional Neural erator. The CNN engine has a weight storage memory of Networks 442KB, and can support 1-, 2-, 4-, and 8-bit weights (sup- • 442k 8-Bit Weight Capacity with 1,2,4,8-Bit Weights porting networks of up to 3.5 million weights). The CNN • Programmable Input Image Size up to 1024 x 1024 weight memory is SRAM-based, so AI network updates pixels can be made on the fly. The CNN engine also has 512KB • Programmable Network Depth up to 64 Layers of data memory. The CNN architecture is highly flexible, • Programmable per Layer Network Channel Widths allowing networks to be trained in conventional toolsets up to 1024 Channels like PyTorch® and TensorFlow®, then converted for exe- • 1 and 2 Dimensional Convolution Processing cution on the MAX78000 using tools provided by Maxim. • Streaming Mode In addition to the memory in the CNN engine, the • Flexibility to Support Other Network Types, MAX78000 has large on-chip system memory for the mi- Including MLP and Recurrent Neural Networks crocontroller core, with 512KB flash and up to 128KB ● Power Management Maximizes Operating Time for SRAM. Multiple high-speed and low-power communica- Battery Applications tions interfaces are supported, including I2S and a parallel • Integrated Single-Inductor Multiple-Output (SIMO) camera interface (PCIF). Switch-Mode Power Supply (SMPS) The device is available in a 81-pin CTBGA (8mm x 8mm, • 2.0V to 3.6V SIMO Supply Voltage Range 0.8mm pitch) package. • Dynamic Voltage Scaling Minimizes Active Core Power Consumption
Applications
• 22.2μA/MHz While Loop Execution at 3.0V from Cache (CM4 Only) ● Object Detection and Classification • Selectable SRAM Retention in Low-Power Modes ● Audio Processing: Multi-Keyword Recognition, Sound with Real-Time Clock (RTC) Enabled Classification, Noise Cancellation ● Facial Recognition ● Security and Integrity ● Time-Series Data Processing: Heart Rate/Health • Available Secure Boot Signal Analysis, Multi-Sensor Analysis, Predictive • AES 128/192/256 Hardware Acceleration Engine Maintenance • True Random Number Generator (TRNG) Seed Generator
Ordering Information appears at end of data sheet.
Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. CoreMark is a registered trademark of the Embedded Microprocessor Benchmark Consortium. Motorola is a registered trademark of Motorola Trademark Holdings, LLC. PyTorch is a trademark of Facebook, Inc. TensorFlow is a trademark of Google, Inc. 19-100868; Rev 1; 5/21 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 81-CTBGA Electrical Characteristics Electrical Characteristics (continued) Electrical Characteristics—SPI Electrical Characteristics—SPI (continued) Electrical Characteristics—I2C Electrical Characteristics—I2C (continued) Electrical Characteristics—I2S Electrical Characteristics—I2S (continued) Electrical Characteristics—PCIF Electrical Characteristics—1-Wire Master Electrical Characteristics—1-Wire Master (continued) Pin Configuration 81 CTBGA Pin Description 81 CTBGA Detailed Description Arm Cortex-M4 with FPU Processor and RISC-V RV32 Processor Convolutional Neural Network Accelerator (CNN) Memory Internal Flash Memory Internal SRAM Comparators Dynamic Voltage Scaling (DVS) Controller Clocking Scheme General-Purpose I/O and Special Function Pins Parallel Camera Interface (PCIF) Analog-to-Digital Converter Single-Inductor Multiple-Output Switch-Mode Power Supply (SIMO SMPS) Power Management Power Management Unit ACTIVE Mode SLEEP Mode LOW POWER Mode (LPM) MICRO POWER Mode (μPM) STANDBY Mode BACKUP Mode POWER DOWN Mode (PDM) Wakeup Sources Real-Time Clock Programmable Timers 32-Bit Timer/Counter/PWM (TMR, LPTMR) Watchdog Timer (WDT) Pulse Train Engine (PT) Serial Peripherals I2C Interface (I2C) I2S Interface (I2S) Serial Peripheral Interface (SPI) UART (UART, LPUART) 1-Wire Master (OWM) Standard DMA Controller Security AES True Random Number Generator (TRNG) Non-Deterministic Random Bit Generator (NDRBG) CRC Module Bootloader Secure Boot Debug and Development Interface (SWD, JTAG) Applications Information Bypass Capacitors Ordering Information Revision History