Datasheet Texas Instruments 66AK2H12 — Ficha de datos

Fabricante	Texas Instruments
Serie	66AK2H12

Hojas de datos

Precios

Estado

Embalaje

Paramétricos

Parameters / Models	66AK2H12BAAW2	66AK2H12BAAW24	66AK2H12BAAWA2	66AK2H12BAAWA24	66AK2H12BXAAW2	66AK2H12DAAW2	66AK2H12DAAW24	66AK2H12DAAWA2	66AK2H12DAAWA24	66AK2H12DXAAWA24
ARM CPU	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15
ARM MHz, Max.	1200,1400	1200,1400	1200,1400	1200,1400	1200,1400	1200,1400	1200,1400	1200,1400	1200,1400	1200,1400
Applications	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space	Automation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space
DRAM	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L
DSP	8 C66x	8 C66x	8 C66x	8 C66x	8 C66x	8 C66x	8 C66x	8 C66x	8 C66x	8 C66x
DSP MHz, Max.	1200	1200	1200	1200	1200	1200	1200	1200	1200	1200
EMAC	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch	4-port 1Gb Switch
Hardware Accelerators	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator	Packet Accelerator,Security Accelerator
I2C	3	3	3	3	3	3	3	3	3	3
On-Chip L2 Cache	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)	4096 KB (ARM Cluster),1024 KB (per C66x DSP core)
Operating Systems	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks	Integrity,Linux,SYS/BIOS,VxWorks
Operating Temperature Range, C	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85	-40 to 100,0 to 85
Other On-Chip Memory	6144 KB	6144 KB	6144 KB	6144 KB	6144 KB	6144 KB	6144 KB	6144 KB	6144 KB	6144 KB
PCI/PCIe	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2	2 PCIe Gen2
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
SPI	3	3	3	3	3	3	3	3	3	3
UART, SCI	2	2	2	2	2	2	2	2	2	2
USB	1	1	1	1	1	1	1	1	1	1

Plan ecológico

Notas de aplicación

• Descargar
  Keystone EDMA FAQ
  PDF, 1.3 Mb, Archivo publicado: sept 1, 2016
  This document is a collection of frequently asked questions (FAQs) on enhanced direct memory access (EDMA) on KeyStoneв„ў I (KS1) and KeyStone II (KS2) devices, along with useful collateral and software reference links.
• Descargar
  Keystone II DDR3 Initialization
  PDF, 73 Kb, Archivo publicado: enero 26, 2015
  This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
• Descargar
  Throughput Performance Guide for KeyStone II Devices (Rev. B)
  PDF, 866 Kb, Revisión: B, Archivo publicado: dic 22, 2015
  This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
• Descargar
  Keystone II DDR3 Debug Guide
  PDF, 143 Kb, Archivo publicado: oct 16, 2015
  This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
• Descargar
  Power Management of KS2 Device (Rev. C)
  PDF, 61 Kb, Revisión: C, Archivo publicado: jul 15, 2016
  This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
• Descargar
  Hardware Design Guide for KeyStone II Devices
  PDF, 1.8 Mb, Archivo publicado: marzo 24, 2014
• Descargar
  Keystone NDK FAQ
  PDF, 54 Kb, Archivo publicado: oct 3, 2016
  This document is a collection of frequently asked questions (FAQ) on running the NDK examples on the KeyStoneв„ў family of devices.
• Descargar
  SERDES Link Commissioning on KeyStone I and II Devices
  PDF, 138 Kb, Archivo publicado: abr 13, 2016
  The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
• Descargar
  PCIe Use Cases for KeyStone Devices
  PDF, 320 Kb, Archivo publicado: dic 13, 2011
• Descargar
  Optimizing Loops on the C66x DSP
  PDF, 585 Kb, Archivo publicado: nov 9, 2010
• Descargar
  Clocking Design Guide for KeyStone Devices
  PDF, 1.5 Mb, Archivo publicado: nov 9, 2010
• Descargar
  The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
  PDF, 20 Kb, Revisión: A, Archivo publicado: nov 10, 2010
  The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
• Descargar
  DDR3 Design Requirements for KeyStone Devices (Rev. B)
  PDF, 582 Kb, Revisión: B, Archivo publicado: jun 5, 2014
• Descargar
  Multicore Programming Guide (Rev. B)
  PDF, 1.8 Mb, Revisión: B, Archivo publicado: agosto 29, 2012
  As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
• Descargar
  TI DSP Benchmarking
  PDF, 62 Kb, Archivo publicado: enero 13, 2016
  This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
• Descargar
  Thermal Design Guide for DSP and ARM Application Processors (Rev. A)
  PDF, 324 Kb, Revisión: A, Archivo publicado: agosto 17, 2016
  This application report has been compiled to provide specific information and considerations regarding thermal design requirements for all DSP and ARM-based single and multi-core processors (collectively referred to as “processors”, “System-on-chip”, or “SoC”). The information contained within this document is intended to provide a minimum level of understanding with regards to the thermal require

Linea modelo

Clasificación del fabricante

• Semiconductors> Processors> Digital Signal Processors> C6000 DSP + ARM Processors> 66AK2x