Datasheet Texas Instruments SN74ALS541 — Ficha de datos

FabricanteTexas Instruments
SerieSN74ALS541
Datasheet Texas Instruments SN74ALS541

Buffers Octal y controladores de línea con salidas de 3 estados

Hojas de datos

Octal Buffers And Line Drivers With 3-State Outputs datasheet
PDF, 1.2 Mb, Revisión: D, Archivo publicado: feb 28, 2002
Extracto del documento

Precios

Estado

SN74ALS541DBRSN74ALS541DBRG4SN74ALS541DWSN74ALS541DWRSN74ALS541DWRG4SN74ALS541NSN74ALS541N3SN74ALS541NE4SN74ALS541NSRSN74ALS541NSRE4SN74ALS541NSRG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNoNoNoNo

Embalaje

SN74ALS541DBRSN74ALS541DBRG4SN74ALS541DWSN74ALS541DWRSN74ALS541DWRG4SN74ALS541NSN74ALS541N3SN74ALS541NE4SN74ALS541NSRSN74ALS541NSRE4SN74ALS541NSRG4
N1234567891011
Pin2020202020202020202020
Package TypeDBDBDWDWDWNNNNSNSNS
Industry STD TermSSOPSSOPSOICSOICSOICPDIPPDIPPDIPSOPSOPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2000200025200020002020200020002000
CarrierLARGE T&RLARGE T&RTUBELARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingG541G541ALS541ALS541ALS541SN74ALS541NSN74ALS541NALS541ALS541ALS541
Width (mm)5.35.37.57.57.56.356.356.355.35.35.3
Length (mm)7.27.212.812.812.824.3324.3324.3312.612.612.6
Thickness (mm)1.951.952.352.352.354.574.574.571.951.951.95
Pitch (mm).65.651.271.271.272.542.542.541.271.271.27
Max Height (mm)222.652.652.655.085.085.08222
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsSN74ALS541DBR
SN74ALS541DBR
SN74ALS541DBRG4
SN74ALS541DBRG4
SN74ALS541DW
SN74ALS541DW
SN74ALS541DWR
SN74ALS541DWR
SN74ALS541DWRG4
SN74ALS541DWRG4
SN74ALS541N
SN74ALS541N
SN74ALS541N3
SN74ALS541N3
SN74ALS541NE4
SN74ALS541NE4
SN74ALS541NSR
SN74ALS541NSR
SN74ALS541NSRE4
SN74ALS541NSRE4
SN74ALS541NSRG4
SN74ALS541NSRG4
Approx. Price (US$)0.58 | 1ku
Bits8888888888
Bits(#)8
F @ Nom Voltage(Max), Mhz75757575757575757575
F @ Nom Voltage(Max)(Mhz)75
ICC @ Nom Voltage(Max), mA0.0250.0250.0250.0250.0250.0250.0250.0250.0250.025
ICC @ Nom Voltage(Max)(mA)0.025
Input TypeTTL
Operating Temperature Range, C0 to 700 to 700 to 700 to 700 to 700 to 700 to 700 to 700 to 700 to 70
Operating Temperature Range(C)0 to 70
Output Drive (IOL/IOH)(Max), mA-15/24-15/24-15/24-15/24-15/24-15/24-15/24-15/24-15/24-15/24
Output Drive (IOL/IOH)(Max)(mA)-15/24
Output TypeTTL
Package GroupSSOPSSOPSOICSOICSOICPDIPPDIPPDIPSOSOSO
Package Size: mm2:W x L, PKG20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)See datasheet (PDIP)See datasheet (PDIP)20SO: 98 mm2: 7.8 x 12.6(SO)20SO: 98 mm2: 7.8 x 12.6(SO)20SO: 98 mm2: 7.8 x 12.6(SO)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNo
Technology FamilyALSALSALSALSALSALSALSALSALSALSALS
VCC(Max), V5.55.55.55.55.55.55.55.55.55.5
VCC(Max)(V)5.5
VCC(Min), V4.54.54.54.54.54.54.54.54.54.5
VCC(Min)(V)4.5
Voltage(Nom), V5555555555
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max), ns14141414141414141414
tpd @ Nom Voltage(Max)(ns)14

Plan ecológico

SN74ALS541DBRSN74ALS541DBRG4SN74ALS541DWSN74ALS541DWRSN74ALS541DWRG4SN74ALS541NSN74ALS541N3SN74ALS541NE4SN74ALS541NSRSN74ALS541NSRE4SN74ALS541NSRG4
RoHSObedienteObedienteObedienteObedienteObedienteObedienteDesobedienteObedienteObedienteObedienteObediente
Pb gratisNo

Notas de aplicación

  • Advanced Schottky (ALS and AS) Logic Families
    PDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
    This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver