Datasheet Texas Instruments SN74ALVCH16827 — Ficha de datos

FabricanteTexas Instruments
SerieSN74ALVCH16827
Datasheet Texas Instruments SN74ALVCH16827

Memoria intermedia / controlador de 20 bits con salidas de 3 estados

Hojas de datos

SN74ALVCH16827 datasheet
PDF, 338 Kb, Revisión: D, Archivo publicado: sept 2, 2004
Extracto del documento

Precios

Estado

74ALVCH16827DGGRE4SN74ALVCH16827DGGRSN74ALVCH16827DL
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

74ALVCH16827DGGRE4SN74ALVCH16827DGGRSN74ALVCH16827DL
N123
Pin565656
Package TypeDGGDGGDL
Industry STD TermTSSOPTSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2000200020
CarrierLARGE T&RLARGE T&RTUBE
Device MarkingALVCH16827ALVCH16827ALVCH16827
Width (mm)6.16.17.49
Length (mm)141418.41
Thickness (mm)1.151.152.59
Pitch (mm).5.5.635
Max Height (mm)1.21.22.79
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / Models74ALVCH16827DGGRE4
74ALVCH16827DGGRE4
SN74ALVCH16827DGGR
SN74ALVCH16827DGGR
SN74ALVCH16827DL
SN74ALVCH16827DL
Bits202020
F @ Nom Voltage(Max), Mhz100100100
ICC @ Nom Voltage(Max), mA0.040.040.04
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-24/24-24/24-24/24
Package GroupTSSOPTSSOPSSOP
Package Size: mm2:W x L, PKG56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56SSOP: 191 mm2: 10.35 x 18.42(SSOP)
RatingCatalogCatalogCatalog
Schmitt TriggerNoNoNo
Technology FamilyALVCALVCALVC
VCC(Max), V3.63.63.6
VCC(Min), V1.651.651.65
Voltage(Nom), V1.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.3
tpd @ Nom Voltage(Max), ns4.1,3.9,3.44.1,3.9,3.44.1,3.9,3.4

Plan ecológico

74ALVCH16827DGGRE4SN74ALVCH16827DGGRSN74ALVCH16827DL
RoHSObedienteObedienteObediente

Notas de aplicación

  • Timing Differences of 10-pF Versus 50pF Loading
    PDF, 47 Kb, Archivo publicado: nov 1, 1996
    The 'ALVCH16244 is a 16-bit advanced low voltage CMOS (ALVC) unidirectional driver. Typically, data sheet values for tpd, ten, and tdis are characterized under a 50-pF capacitive load with a temperature range of -40?C to 85?C. At times these drivers are used in memory addressing for dual in-line memory modules (DIMM) with a 10-pF load and and temperature range of 0?C to 70?C. This document provide
  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, Archivo publicado: agosto 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • Bus-Hold Circuit
    PDF, 418 Kb, Archivo publicado: feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Kb, Revisión: A, Archivo publicado: agosto 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, Archivo publicado: mayo 1, 1996
  • Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
    PDF, 115 Kb, Archivo publicado: dic 1, 1997
    This application report explores the possibilities for migrating to 3.3-V and 2.5-V power supplies and discusses the implications.Customers are successfully using a wide range of low-voltage 3.3-V logic devices. These devices are within Texas Instruments (TI) advanced low-voltage CMOS (ALVC) crossbar technology (CBT) crossbar technology with integrated diode (CBTD) low-voltage crossbar techn
  • Live Insertion
    PDF, 150 Kb, Archivo publicado: oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, Archivo publicado: oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver