Datasheet MCP6481, MCP6482, MCP6484 (Microchip) - 4

FabricanteMicrochip
DescripciónThe Microchip’s MCP6481 operational amplifiers (op amps) has low input bias current (150 pA, typical at 125°C) and rail-to-rail input and output operation
Páginas / Página50 / 4 — MCP6481/2/4. TABLE 1-1:. DC ELECTRICAL SPECIFICATIONS (CONTINUED). …
Formato / tamaño de archivoPDF / 1.9 Mb
Idioma del documentoInglés

MCP6481/2/4. TABLE 1-1:. DC ELECTRICAL SPECIFICATIONS (CONTINUED). Electrical Characteristics. Parameters. Sym. Min. Typ. Max. Units

MCP6481/2/4 TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics Parameters Sym Min Typ Max Units

Línea de modelo para esta hoja de datos

Versión de texto del documento

link to page 5 link to page 4
MCP6481/2/4 TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS = GND, TA = +25°C, V  CM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 10 kto VL. (Refer to Figure 1-1).
Parameters Sym. Min. Typ. Max. Units Conditions Output
High-Level Output Voltage VOH 2.180 2.196 — V VDD = 2.2V 0.5V input overdrive 5.480 5.493 — V VDD = 5.5V 0.5V input overdrive Low-Level Output Voltage VOL — 0.004 0.020 V VDD = 2.2V 0.5 V input overdrive — 0.007 0.020 V VDD = 5.5V 0.5 V input overdrive Output Short-Circuit Current ISC — ±12 — mA VDD = 2.2V — ±36 — mA VDD = 5.5V
Power Supply
Supply Voltage VDD 2.2 — 5.5 V Quiescent Current per Amplifier IQ 100 240 400 µA IO = 0, VCM = VDD/4
TABLE 1-2: AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, V  CM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. (Refer to Figure 1-1).
Parameters Sym. Min. Typ. Max. Units Conditions AC Response
Gain Bandwidth Product GBWP — 4 — MHz Phase Margin PM — 60 — ° G = +1V/V Slew Rate SR — 2.7 — V/µs
Noise
Input Noise Voltage Eni — 7 — µVp-p f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 23 — nV/Hz f = 1 kHz — 18 — nV/Hz f = 10 kHz Input Noise Current Density ini — 0.6 — fA/Hz f = 1 kHz
TABLE 1-3: TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, VDD = +2.2V to +5.5V and VSS = GND.
Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges
Operating Temperature Range TA -40 — +125 °C
Note 1
Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SC-70 JA — 331 — °C/W Thermal Resistance, 5L-SOT-23 JA — 256 — °C/W Thermal Resistance, 8L-2x3 TDFN JA — 52.5 — °C/W Thermal Resistance, 8L-MSOP JA — 211 — °C/W Thermal Resistance, 8L-SOIC JA — 149.5 — °C/W Thermal Resistance, 14L-SOIC JA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP JA — 100 — °C/W
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C. DS20002322C-page 4  2012-2013 Microchip Technology Inc. Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6481/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6482/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service