Datasheet AD5381 (Analog Devices) - 3

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AD5381 Data Sheet TABLE OF CONTENTS
Features .. 1 Hardware Functions ... 26 Integrated Functions .. 1 Reset Function .. 26 Applications ... 1 Asynchronous Clear Function .. 26 Functional Block Diagram .. 1 BUSY and LDAC Functions.. 26 Revision History ... 3 FIFO Operation in Parallel Mode .. 26 General Description ... 4 Power-On Reset .. 26 Specifications ... 5 Power-Down ... 26 AD5381-5 Specifications ... 5 Interfaces.. 27 AD5381-3 Specifications ... 7 DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces ... 27 AC Characteristics .. 8 I2C Serial Interface ... 29 Timing Characteristics ... 9 Parallel Interface ... 31 Serial Interface Timing .. 9 Microprocessor Interfacing ... 32 I2C Serial Interface Timing.. 11 Applications Information .. 34 Parallel Interface Timing ... 12 Power Supply Decoupling ... 34 Absolute Maximum Ratings .. 14 Power Supply Sequencing ... 34 ESD Caution .. 14 Typical Configuration Circuit .. 35 Pin Configuration and Function Descriptions ... 15 Monitor Function ... 36 Terminology .. 18 Toggle Mode Function ... 36 Typical Performance Characteristics ... 19 Thermal Monitor Function ... 36 Functional Description .. 22 Optical Attenuators .. 37 DAC Architecture—General ... 22 Utilizing FIFO ... 37 Data Decoding .. 22 Outline Dimensions ... 38 On-Chip Special Function Registers (SFR) .. 23 Ordering Guide .. 38 SFR Commands .. 23 Rev. E | Page 2 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table Of Contents Revision History General Description Specifications AD5381-5 Specifications AD5381-3 Specifications AC Characteristics Timing Characteristics Serial Interface Timing I2C Serial Interface Timing Parallel Interface Timing Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write CLR Code Soft CLR Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Control Register Contents Channel Monitor Function Hardware Functions Reset Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down Interfaces DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer START and STOP Conditions Repeated START Conditions Acknowledge Bit (ACK) AD5381 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pin A5 to Pin A0 Pin DB11 to Pin DB0 Microprocessor Interfacing Parallel Interface AD5381 to MC68HC11 AD5381 to PIC16C6x/7x AD5381 to 8051 AD5381 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit Monitor Function Toggle Mode Function Thermal Monitor Function Optical Attenuators Utilizing FIFO Outline Dimensions Ordering Guide