Datasheet InnoSwitch3-Pro (Power Integrations) - 10

FabricantePower Integrations
DescripciónDigitally Controllable Off-Line CV/CC QR Flyback Switcher IC with Integrated High-Voltage Switch, Synchronous Rectification and FluxLink Feedback
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InnoSwitch3-Pro. PI COMMAND Register Address Assignments, Description and Control Range. Register Address. Name. Function

InnoSwitch3-Pro PI COMMAND Register Address Assignments, Description and Control Range Register Address Name Function

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InnoSwitch3-Pro PI COMMAND Register Address Assignments, Description and Control Range
Al command register addresses in InnoSwitch3-Pro are odd-parity addressing. Some select registers (some highlighted below) also employ odd parity error bit to the high and low bytes of data.
Register Address Name Function Adjustment Address Range Type Default Description Address with Odd Parity
bit[7] Parity VBEN Series Bus Enable or Switch Control Disabled? 0x04 WR_Byte 0x0 bit[1:0] {11} Enable VBEN/Disable VDIS {00} Disable VBEN Activate Enable or {0}: Disabled BLEEDER Bleeder (V ) {1}: Enabled OUT Function Disabled? 0x06 0x86 WR_Byte 0x0 bit[0] OTP clears this register bit[7] Parity VDIS Load (VBUS) Enable or Discharge Disabled? 0x08 W/R_Byte 0x0 bit[1:0] {11} Enable Discharge/Disable VBEN bit[3:2] {11} Disable Discharge Turn-Off Latch-off Enable or PSU Device Disabled? 0x0A 0x8A W/R_Byte 0x0 bit[0] {0}: Disabled {1}: Enabled Fast VI Speed of CV/CC 10 ms Update Command Update Limit or 0x0C 0x8C W/R_Byte 0x0 bit[0] {1}: Disable 10 msec update No Speed Limit? limit CVO Constant- Voltage Only Only CV Mode 0x0E W/R_Byte 0x0 bit[0] {1}: CV Only Mode/No CC Regulation bit[15] High Byte Parity 3 V to 24 V 500 Range bit[12:8] CV Output Voltage (10 mV/step) 0x10 W/R_Word (5 V) {300 to 2400} 10 mV/LSB bit[7] Low Byte Parity bit[6:0] bit[15] High Byte Parity 6.2 V to 25 V 62 Range bit[8] OVA Overvoltage Threshold (100 mV/step) 0x12 0x92 W/R_Word (6.2 V) {62 to 250} 100 mV/LSB bit[7] Low Byte Parity bit[6:0] bit[15] High Byte Parity 36 Range bit[8] UVA Undervoltage 3 V to 24 V Threshold (100 mV/step) 0x14 0x94 W/R_Word (3.6 V) {30 to 240} 100 mV/LSB bit[7] Low Byte Parity bit[6:0] CDC Cable Drop 0 mV to 600 mV Compensation (50 mV/step) 0x16 W/R_Word 0 (0 V) bit[3:0] Range {0 to 12} 50 mV/LSB bit[15] High Byte Parity Range Constant 20% to 100% of bit[8] CC Current CC, (0.25 mV/ 0x18 0x98 W/R_Word 128 {25 (20%) Regulation step/Rs) (100%) to 128 bit[7] Low Byte Parity (100%)} bit[6:0] Table 2. Command Register Assignments.
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Rev. G 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-Pro Functional Description Primary Controller Secondary Controller Register Definition Command Registers Telemetry (Read-back) Registers I2C Connection I2C Example Waveforms Applications Example Key application Considerations Selection of Components Components for InnoSwitch3-Pro IC Primary-Side Circuit Components for InnoSwitch3-PRO Secondary-Side Circuit Recommendations for Circuit Board Layout Layout Example Recommendations for Transformer Design Application Considerations for INN3379C and INN3370C Only Quick Design Checklist Theremal Resistance Test Conditions for INN3379C and INN3370C Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Curves InSOP-24D Package Drawing Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information