Datasheet ADM7155 (Analog Devices) - 4

FabricanteAnalog Devices
Descripción600 mA, Ultralow Noise, High PSRR, RF Linear Regulator
Páginas / Página24 / 4 — ADM7155. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. …
RevisiónC
Formato / tamaño de archivoPDF / 718 Kb
Idioma del documentoInglés

ADM7155. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

ADM7155 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit

Línea de modelo para esta hoja de datos

Versión de texto del documento

ADM7155 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
VREG THRESHOLDS5 Rising VREG_UVLORISE 1.94 V Falling VREG_UVLOFALL 1.60 V Hysteresis VREG_UVLOHYS 185 mV PRECISION EN INPUT 2.3 V ≤ VIN ≤ 5.5 V Logic High ENHIGH 1.13 1.22 1.31 V Logic Low ENLOW 1.05 1.13 1.22 V Logic Hysteresis ENHYS 90 mV Leakage Current IEN-LKG EN = VIN or GND 0.01 1 μA 1 Based on an endpoint calculation using 1 mA and 600 mA loads. 2 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V. 3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages above 2.3 V. 4 Start-up time is defined as the time between the rising edge of VEN to VOUT, VREG, or VREF being at 90% of the nominal value. 5 The output voltage is disabled until the VREG UVLO rise threshold is crossed. The VREG output is disabled until the input voltage UVLO rising threshold is crossed.
Table 3. Input and Output Capacitors, Recommended Specifications Parameter Symbol Test Conditions/Comments Min Typ Max Unit
MINIMUM CAPACITANCE Input1 CIN TA = −40°C to +125°C 7.0 μF Regulator1 CREG TA = −40°C to +125°C 7.0 μF Output1 COUT TA = −40°C to +125°C 7.0 μF Bypass CBYP TA = −40°C to +125°C 0.1 μF Reference CREF TA = −40°C to +125°C 0.7 μF CAPACITOR ESR CREG, COUT, CIN, CREF RESR TA = −40°C to +125°C 0.001 0.2 Ω CBYP RESR TA = −40°C to +125°C 0.001 2.0 Ω 1 The minimum input, regulator, and output capacitances must be greater than 7.0 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. C | Page 4 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) PROGRAMMABLE PRECISION ENABLE START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PSRR PERFORMANCE PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE