Datasheet EL2002, EL2003 (Elantec) - 12

EL2003, EL2033 EL2003 Macromodel
* Connections: +input * | +Vsupply * | | -Vsupply * | | | output * | | | | .subckt M2003 2 1 4 7 * Input Stage e1 10 0 2 0 1.0 r1 10 0 1K rh 10 11 150 ch 11 0 10pF rc 11 12 100 cc 12 0 3pF e2 13 0 12 0 1.0 * Output Stage q1 4 13 14 qp q2 1 13 15 qn q3 1 14 16 qn q4 4 15 19 qp r2 16 7 5 r3 19 7 5 c1 14 0 3pF c2 15 0 3pF i1 1 14 3mA i2 15 4 3mA * Bias Current iin+ 2 0 5uA * Models .model qn npn(is=5e-15 bf=150 rb=350 ptf=45 cjc=2pF tf=0.3nS) .model qp pnp(is=5e-15 bf=150 rb=350 ptf=45 cjc=2pF tf=0.3nS) .ends All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12