Datasheet HMC637BPM5E (Analog Devices)

FabricanteAnalog Devices
DescripciónGaAs, pHEMT, MMIC, Single Positive Supply, DC to 7.5 GHz, 1 W Power Amplifier
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RevisiónA
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GaAs, pHEMT, MMIC, Single Positive. Supply, DC to 7.5 GHz, 1 W Power Amplifier. Data Sheet. HMC637BPM5E. FEATURES

Datasheet HMC637BPM5E Analog Devices, Revisión: A

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GaAs, pHEMT, MMIC, Single Positive Supply, DC to 7.5 GHz, 1 W Power Amplifier Data Sheet HMC637BPM5E FEATURES FUNCTIONAL BLOCK DIAGRAM 1 2 P1dB output power: 28 dBm typical C C C C ND ND Gain: 15.5 dB typical G NI ACG ACG NI NI NI G 32 31 30 29 28 27 26 25 Output IP3: 39 dBm typical Self biased at VDD = 12 V at 345 mA typical GND 1 24 GND Optional bias control on V V 2 23 NIC GG1 for IDQ adjustment GG2 NIC 3 22 GND Optional bias control on VGG2 for IP2 and IP3 optimization GND 4 21 RFOUT/VDD 50 Ω matched input/output RFIN 5 20 GND GND 6 19 NIC 32-lead, 5 mm × 5 mm LFCSP package: 25 mm2 NIC 7 18 NIC GND 8 17 GND APPLICATIONS 9 1 Military and space 1 PACKAGE 10 12 13 14 15 16 1 3 BASE C C C C
001
Test instrumentation ND NI NI NI NI ND G GGV G ACG GND
16273- Figure 1.
GENERAL DESCRIPTION
The HMC637BPM5E is a gallium arsenide (GaAs), monolithic and a 3.5 dB noise figure, while requiring 345 mA from a 12 V microwave integrated circuit (MMIC), pseudomorphic high supply voltage (VDD). Gain flatness is excellent from dc to 7.5 GHz electron mobility transistor (pHEMT), cascode distributed at ±0.5 dB typical, making the HMC637BPM5E ideal for military, power amplifier. The device is self biased in normal operation space, and test equipment applications. The HMC637BPM5E and features optional bias control for quiescent current (IDQ) also features inputs/outputs (I/Os) that are internally matched to adjustment and for second-order intercept (IP2) and third-order 50 Ω, housed in a RoHS-compliant, 5 mm × 5 mm, premolded intercept (IP3) optimization. The amplifier operates from dc to cavity, lead frame chip scale package (LFCSP), making the device 7.5 GHz, providing 15.5 dB of small signal gain, 28 dBm output compatible with high volume, surface-mount technology (SMT) power at 1 dB gain compression, a typical output IP3 of 39 dBm, assembly equipment.
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. No license is granted by implication or otherwise under any patent or patent rights of Analog Tel: 781.329.4700 ©2018–2020 Analog Devices, Inc. All rights reserved. Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS FREQUENCY RANGE = DC TO 7.5 GHz ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT EVALUATION PCB BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE