Datasheet ADG613-EP (Analog Devices) - 3

FabricanteAnalog Devices
Descripción1 pC Charge Injection, 100 pA Leakage, CMOS, ±5 V/ +5 V/ +3 V, Quad SPST Switches
Páginas / Página12 / 3 — Enhanced Product. ADG613-EP. SPECIFICATIONS. DUAL-SUPPLY OPERATION. Table …
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Enhanced Product. ADG613-EP. SPECIFICATIONS. DUAL-SUPPLY OPERATION. Table 1. Parameter. 25°C. −55°C to +125°C. Unit

Enhanced Product ADG613-EP SPECIFICATIONS DUAL-SUPPLY OPERATION Table 1 Parameter 25°C −55°C to +125°C Unit

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Enhanced Product ADG613-EP SPECIFICATIONS DUAL-SUPPLY OPERATION
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. VS is the source voltage. VD is the drain voltage.
Table 1. Parameter 25°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VSS to VDD V On Resistance, RON 85 Ω typ VS = ±3 V, IS = −1 mA; see Figure 14 115 160 Ω max VS = ±3 V, IS = −1 mA; see Figure 14 On-Resistance Match Between Channels, ΔRON 2 Ω typ VS = ±3 V, IS = −1 mA 4 6.5 Ω max VS = ±3 V, IS = −1 mA On-Resistance Flatness, RFLAT(ON) 25 Ω typ VS = ±3 V, IS = −1 mA 40 60 Ω max VS = ±3 V, IS = −1 mA LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V Source Off Leakage, IS(OFF) ±0.01 nA typ VD = ±4.5 V, VS = +4.5 V; see Figure 15 ±0.1 ±2 nA max VD = ±4.5 V, VS = +4.5 V; see Figure 15 Drain Off Leakage, ID(OFF) ±0.01 nA typ VD = ±4.5 V, VS = +4.5 V; see Figure 15 ±0.1 ±2 nA max VD = ±4.5 V, VS = +4.5 V; see Figure 15 Channel On Leakage, ID(ON), IS(ON) ±0.01 nA typ VD = VS = ±4.5 V; see Figure 16 ±0.1 ±6 nA max VD = VS = ±4.5 V; see Figure 16 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max VIN = VINL or VINH Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS1 Delay from Digital Control Input and Output 45 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 Switching On, tON 65 90 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 Delay from Digital Control Input and Output 25 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 Switching Off, tOFF 40 50 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17 Break-Before-Make Time Delay, tBBM 15 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18 10 ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18 Charge Injection −0.5 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19 Off Isolation −65 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20 Channel to Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21 −3 dB Bandwidth 680 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 22 Off Switch Source Capacitance, CS(OFF) 5 pF typ f = 1 MHz Off Switch Drain Capacitance, CD(OFF) 5 pF typ f = 1 MHz On Switch Capacitance, CD(ON), CS(ON) 5 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V Positive Supply Current, IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max Digital inputs = 0 V or 5.5 V Negative Supply Current, ISS 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max Digital inputs = 0 V or 5.5 V VDD/VSS ±2.7 V min ±5.5 V max Power Consumption 11 nW typ 11 µW max 1 Guaranteed by design; not subject to production test. Rev. A | Page 3 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY OPERATION SINGLE-SUPPLY OPERATION ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE