Datasheet Texas Instruments ADS7841ESQDBQRQ1 — Ficha de datos

FabricanteTexas Instruments
SerieADS7841-Q1
Numero de parteADS7841ESQDBQRQ1
Datasheet Texas Instruments ADS7841ESQDBQRQ1

Convertidor analógico a digital de muestreo de salida de serie de 4 canales y 12 bits para automóviles 16-SSOP -40 a 125

Hojas de datos

12-Bit 4-Channel Serial-Output Sampling Analog-to-Digital Converter.. datasheet
PDF, 1.3 Mb, Revisión: C, Archivo publicado: oct 28, 2012
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

Pin16
Package TypeDBQ
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingS7841S
Width (mm)3.9
Length (mm)4.9
Thickness (mm)1.5
Pitch (mm).64
Max Height (mm)1.75
Mechanical DataDescargar

Paramétricos

# Input Channels4
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.25 V
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceSerial
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 125 C
Package GroupSSOP
Package Size: mm2:W x L16SSOP: 19 mm2: 3.9 x 4.9(SSOP) PKG
Power Consumption(Typ)0.84 mW
RatingAutomotive
Reference ModeExt
Resolution12 Bits
SINAD71 dB
SNR73 dB
Sample Rate (max)200kSPS SPS
Sample Rate(Max)0.2 MSPS
THD(Typ)-78 dB

Plan ecológico

RoHSObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015

Linea modelo

Serie: ADS7841-Q1 (2)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)