Datasheet Texas Instruments CD74HCT4046AEE4 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CD74HCT4046A |
| Numero de parte | CD74HCT4046AEE4 |
Bucle de sincronización de fase lógica CMOS de alta velocidad con VCO 16-PDIP -55 a 125
Hojas de datos
CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A datasheet
PDF, 833 Kb, Revisión: J, Archivo publicado: nov 21, 2003
Extracto del documento
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 16 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Package QTY | 25 |
| Carrier | TUBE |
| Device Marking | CD74HCT4046AE |
| Width (mm) | 6.35 |
| Length (mm) | 19.3 |
| Thickness (mm) | 3.9 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Descargar |
Paramétricos
| Bits | 1 |
| F @ Nom Voltage(Max) | 25 Mhz |
| ICC @ Nom Voltage(Max) | 0.08 mA |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 4/-4 mA |
| Package Group | PDIP |
| Package Size: mm2:W x L | See datasheet (PDIP) PKG |
| Rating | Catalog |
| Technology Family | HCT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 85 ns |
Plan ecológico
| RoHS | Obediente |
| Pb gratis | Sí |
Notas de aplicación
- Implementation of FSK Modulation and Demodulation using CD74HC4046APDF, 1.3 Mb, Archivo publicado: nov 25, 2013
- CMOS Phase-Locked-Loop Applications (Rev. B)PDF, 687 Kb, Revisión: B, Archivo publicado: sept 19, 2002
Applications of the HC/HCT4046A phase-locked loop (PLL) and HC/HCT7046A PLL with lock detection are provided including design examples with calculated and measured results. Features of these devices relative to phase comparators lock indicators voltage-controlled oscillators (VCOs) and filter design are presented.
Linea modelo
Serie: CD74HCT4046A (9)
Clasificación del fabricante
- Semiconductors > Logic > Specialty Logic > Phase-Locked-Loop (PLL)/Oscillator