Datasheet Texas Instruments SN74ALVC244DGVRG4 — Ficha de datos

FabricanteTexas Instruments
SerieSN74ALVC244
Numero de parteSN74ALVC244DGVRG4
Datasheet Texas Instruments SN74ALVC244DGVRG4

Octal Buffer / Driver con salidas de 3 estados 20-TVSOP -40 a 85

Hojas de datos

SN74ALVC244 datasheet
PDF, 1.3 Mb, Revisión: G, Archivo publicado: agosto 31, 2004
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin20
Package TypeDGV
Industry STD TermTVSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingVA244
Width (mm)4.4
Length (mm)5
Thickness (mm)1.05
Pitch (mm).4
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

Bits8
F @ Nom Voltage(Max)100 Mhz
ICC @ Nom Voltage(Max)0.024 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)-24/24 mA
Package GroupTVSOP
Package Size: mm2:W x L20TVSOP: 32 mm2: 6.4 x 5(TVSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyALVC
VCC(Max)3.6 V
VCC(Min)1.65 V
Voltage(Nom)1.8,2.5,2.7,3.3 V
tpd @ Nom Voltage(Max)4.4,3.1,2.8 ns

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Development Kits: TMDSCNCD28379D
    F28379D controlCARD for C2000 Real time control development kits
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: LEDSPIMCUEVM-879
    TPS92518 Dual Buck Evaluation Board with SPI Interface
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Development Kits: TMDSDOCK28379D
    F28379D Delfino Experimenter Kit
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: TMDXDOCK280049M
    F280049M Experimenter's Kit for C2000 Real-Time Control Development Kits
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, Archivo publicado: agosto 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, Archivo publicado: mayo 1, 1996

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver