Datasheet Texas Instruments CDC7005ZVA — Ficha de datos

FabricanteTexas Instruments
SerieCDC7005
Numero de parteCDC7005ZVA
Datasheet Texas Instruments CDC7005ZVA

Sincronizador de reloj de alto rendimiento, bajo ruido de fase y bajo sesgo que sincroniza el reloj de referencia con VCXO 64-BGA -40 a 85

Hojas de datos

3.3-V High Performance Clock Synthesizer & Jitter Cleaner datasheet
PDF, 1.1 Mb, Revisión: L, Archivo publicado: jun 4, 2009
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin64
Package TypeZVA
Industry STD TermBGA
JEDEC CodeS-PBGA-N
Package QTY348
CarrierJEDEC TRAY (10+1)
Device MarkingCK7005Z
Width (mm)8
Length (mm)8
Thickness (mm).96
Pitch (mm).8
Max Height (mm)1.4
Mechanical DataDescargar

Paramétricos

Divider Ratio1 to 16
Input LevelLVCMOS (REF_CLK),LVPECL (VCXO_CLK)
Number of Inputs1
Number of Outputs5
Operating Temperature Range-40 to 85 C
Output Frequency(Max)800 MHz
Output Frequency(Min)10 MHz
Output LevelLVPECL
Package GroupBGA
Package Size: mm2:W x L64BGA: 64 mm2: 8 x 8(BGA) PKG
RatingCatalog
Special FeaturesOPAMP for Active Loop Filter,Programmable Delay
Supply Voltage(Max)3.6 V
Supply Voltage(Min)3 V

Plan ecológico

RoHSObediente
Pb gratis

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: CDC7005QFN-EVM
    CDC7005 QFN Package Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: CDC7005-EVM
    CDC7005 Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: CDCM7005BGA-EVM
    CDCM7005 BGA Package Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: CDCM7005QFN-EVM
    CDCM7005 QFN Package Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Open Loop Phase-Noise Performance of CDC7005 at Various Frequencies
    PDF, 353 Kb, Archivo publicado: dic 17, 2004
    This application brief presents phase-noise data taken on Texas Instruments CDC7005 jitter cleaner and synchronizer PLL. The phase noise performance of CDC7005 depends on thephase noise of the reference clock, the voltage-controlled crystal oscillator (VCXO) clock,and the CDC7005 itself. This applications brief shows the phase noise performance of the CDC7005 clock synthesizer at the most popula
  • Phase Noise (Jitter) Performance of CDC7005 With Different VCXOs (Rev. A)
    PDF, 1.3 Mb, Revisión: A, Archivo publicado: jul 19, 2005
  • Using The CDC7005 as a 1:5 PECL Buffer w/Programmable Divider Ratio (Rev. B)
    PDF, 85 Kb, Revisión: B, Archivo publicado: dic 15, 2009
  • General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner (Rev. A)
    PDF, 207 Kb, Revisión: A, Archivo publicado: dic 16, 2003
  • Basics of the CDC7005 Hold Function
    PDF, 233 Kb, Archivo publicado: abr 13, 2006
    The CDC7005 is a high-performance clock synthesizer and jitter cleaner with implemented hold functionality. The hold functionality can be used for fail-safe operation if the reference clock is missing. This application report describes the basis, the advantages, and the limitations of the CDC7005 hold functionality. Additionally, a discrete realization of a simplified external hold function is sho
  • Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC Dev
    PDF, 627 Kb, Archivo publicado: jun 25, 2004
    Texas Instruments has introduced a family of devices suited to meet the demand for high-speed, high-IF sampling ADC devices like the ADS5500 ADC, capable of sampling at 125 MSPS. To realize the full potential of these high performance devices, it is imperative to provide an extremely low phase noise clock source. The CDC7005 clock distribution chip offers a real-world clocking solution to meet the

Linea modelo

Clasificación del fabricante

  • Semiconductors > Clock and Timing > Clock Jitter Cleaners > Single-Loop PLL