Datasheet Texas Instruments CD4072BNSR — Ficha de datos

FabricanteTexas Instruments
SerieCD4072B
Numero de parteCD4072BNSR
Datasheet Texas Instruments CD4072BNSR

CMOS Dual 4-Input OR Gate 14-SO -55 a 125

Hojas de datos

CD4071B, CD4072B, CD4075B TYPES datasheet
PDF, 1.7 Mb, Revisión: D, Archivo publicado: agosto 21, 2003
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin14
Package TypeNS
Industry STD TermSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingCD4072B
Width (mm)5.3
Length (mm)10.3
Thickness (mm)1.95
Pitch (mm)1.27
Max Height (mm)2
Mechanical DataDescargar

Paramétricos

Bits2
F @ Nom Voltage(Max)8 Mhz
ICC @ Nom Voltage(Max)0.015 mA
IOH(Max)-1.5 mA
IOL(Max)1.5 mA
Operating Temperature Range-55 to 125 C
Package GroupSO
Package Size: mm2:W x L14SO: 80 mm2: 7.8 x 10.2(SO) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyCD4000
VCC(Max)18 V
VCC(Min)3 V
Voltage(Nom)10 V
tpd @ Nom Voltage(Max)120 ns

Plan ecológico

RoHSObediente

Notas de aplicación

  • Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
    PDF, 188 Kb, Archivo publicado: dic 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Archivo publicado: jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
  • Introduction to Logic
    PDF, 93 Kb, Archivo publicado: abr 30, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Gate > OR Gate