Datasheet Texas Instruments ADS7865IPBSG4 — Ficha de datos

FabricanteTexas Instruments
SerieADS7865
Numero de parteADS7865IPBSG4
Datasheet Texas Instruments ADS7865IPBSG4

Dual, 2MSPS, 12 bits, 3 + 3 o 2 + 2 canales, muestreo simultáneo ADC 32-TQFP -40 a 125

Hojas de datos

Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling ADC datasheet
PDF, 780 Kb, Revisión: C, Archivo publicado: abr 17, 2012
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin32
Package TypePBS
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierJEDEC TRAY (5+1)
Device Marking7865I A
Width (mm)5
Length (mm)5
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

# Input Channels6
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeDifferential,Pseudo-Differential
Integrated FeaturesN/A
InterfaceParallel
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 125 C
Package GroupTQFP
Package Size: mm2:W x L32TQFP: 49 mm2: 7 x 7(TQFP) PKG
Power Consumption(Typ)30 mW
RatingCatalog
Reference ModeExt,Int
Resolution12 Bits
SINAD71.3 dB
SNR71.7 dB
Sample Rate (max)2MSPS SPS
Sample Rate(Max)2 MSPS
THD(Typ)-87 dB

Plan ecológico

RoHSObediente

Notas de aplicación

  • Interfacing the ADS786x to the MSP430F2013
    PDF, 90 Kb, Archivo publicado: jun 15, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the MSP430F2013 universal serial interface (USI) in SPI mode. The flexible clocking scheme of the USI port, along with the internal 16-bit shift register, provides an easy hardware/software interface to this series of high-speed, micro-power SAR converters.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015

Linea modelo

Serie: ADS7865 (3)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)