Datasheet Texas Instruments SN74LS280J — Ficha de datos

FabricanteTexas Instruments
SerieSN74LS280
Numero de parteSN74LS280J
Datasheet Texas Instruments SN74LS280J

Generadores / verificadores de paridad impar / par de 9 bits 14-CDIP 0 a 70

Hojas de datos

9-Bit Odd/Even Parity Generators/Checkers datasheet
PDF, 1.0 Mb, Archivo publicado: marzo 1, 1988
Extracto del documento

Precios

Estado

Estado del ciclo de vidaObsoleto (El fabricante ha interrumpido la producción del dispositivo)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin14
Package TypeJ
Industry STD TermCDIP
JEDEC CodeR-GDIP-T
Width (mm)6.67
Length (mm)19.56
Thickness (mm)4.57
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataDescargar

Paramétricos

Approx. Price (US$)0.45 | 1ku
Bits(#)2
F @ Nom Voltage(Max)(Mhz)35
FunctionParity
ICC @ Nom Voltage(Max)(mA)27
Input TypeTTL
Operating Temperature Range(C)0 to 70
Output Drive (IOL/IOH)(Max)(mA)8/-0.4
Output TypeCMOS
Package GroupPDIP
SO
SOIC
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
See datasheet (CDIP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyLS
TypeOther
VCC(Max)(V)5.25
VCC(Min)(V)4.75
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max)(ns)50

Plan ecológico

RoHSDesobediente
Pb gratisNo

Notas de aplicación

  • Designing with the SN54/74LS123 (Rev. A)
    PDF, 118 Kb, Revisión: A, Archivo publicado: marzo 1, 1997
    The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Specialty Logic > Counter/Arithmetic/Parity Function