CD74HC652,
CD74HCT652
Data sheet acquired from Harris Semiconductor
SCHS194A High-Speed CMOS Logic
Octal-Bus Transceiver/Registers, Three-State February 1998 -Revised May 2003 Features Description CD74HC652, CD74HCT652 . Non-Inverting The CD74HC652 and CD74HCT652 three-state, octal-bus
transceiver/registers use silicon-gate CMOS technology to
achieve operating speeds similar to LSTTL with the low power
consumption of standard CMOS integrated circuits. The
CD74HC652 and CD74HCT652 have non-inverting outputs.
These devices consists of bus transceiver circuits, D-type flipflops, and control circuitry arranged for multiplexed
transmission of data directly from the data bus or from the
internal storage registers. Output Enables OEAB and OEBA
are provided to control the transceiver functions. SAB and
SBA control pins are provided to select whether real-time or
stored data is transferred. The circuitry used for select control
will eliminate the typical decoding glitch that occurs in a
multiplexer during the transition between stored and real-time
data. A LOW input level selects real-time data, and a HIGH
selects stored data. The following examples demonstrates the
four fundamentals bus-management functions that can be
performed with the octal-bus transceivers and registers. [ /Title
Independent
Registers for …
