Datasheet Texas Instruments SN74ALS112ANSR — Ficha de datos

FabricanteTexas Instruments
SerieSN74ALS112A
Numero de parteSN74ALS112ANSR
Datasheet Texas Instruments SN74ALS112ANSR

Chanclas de doble JK de borde negativo disparado con claro y preestablecido 16-SO 0 a 70

Hojas de datos

Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset datasheet
PDF, 988 Kb, Revisión: A, Archivo publicado: dic 1, 1994
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin16
Package TypeNS
Industry STD TermSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingALS112A
Width (mm)5.3
Length (mm)10.3
Thickness (mm)1.95
Pitch (mm)1.27
Max Height (mm)2
Mechanical DataDescargar

Paramétricos

Bits2
F @ Nom Voltage(Max)75 Mhz
ICC @ Nom Voltage(Max)4.5 mA
Output Drive (IOL/IOH)(Max)-0.4/8 mA
Package GroupSO
Package Size: mm2:W x L16SO: 80 mm2: 7.8 x 10.2(SO) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyALS
VCC(Max)5.5 V
VCC(Min)4.5 V
Voltage(Nom)5 V
tpd @ Nom Voltage(Max)18 ns

Plan ecológico

RoHSObediente

Notas de aplicación

  • Advanced Schottky (ALS and AS) Logic Families
    PDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
    This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop