Datasheet Texas Instruments TMS320C6654CZHA8 — Ficha de datos

FabricanteTexas Instruments
SerieTMS320C6654
Numero de parteTMS320C6654CZHA8
Datasheet Texas Instruments TMS320C6654CZHA8

Procesador de señal digital de punto fijo y flotante 625-FCBGA -40 a 100

Hojas de datos

TMS320C6652 and TMS320C6654 Fixed and Floating-Point Digital Signal Processor datasheet
PDF, 1.7 Mb, Revisión: D, Archivo publicado: jun 22, 2016
Extracto del documento

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin625625625
Package TypeCZHCZHCZH
Package QTY606060
CarrierJEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)
Device MarkingTMS320C6654CZH@2012 TIA850MHZ
Width (mm)212121
Length (mm)212121
Thickness (mm)2.422.422.42
Mechanical DataDescargarDescargarDescargar

Paramétricos

ApplicationsGrid Infrastructure,Machine Vision
DRAMDDR3
DSP1 C66x
DSP MHz750,850 Max.
EMAC10/100/1000
GFLOPS12,13.6
On-Chip L2 Cache1024 KB
Operating Temperature Range-40 to 100,0 to 85 C
Other On-Chip Memory1024 KB
PCI/PCIe2 PCIe Gen2
Package Size: mm2:W x LSee datasheet (FCBGA) PKG
RatingCatalog
Serial I/OI2C,SPI,UART,UPP
Total On-Chip Memory1088 KB

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • JTAG Emulators/ Analyzers: TMDSEMU200-U
    XDS200 USB Debug Probe
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: TMDSEVM6657
    TMS320C6657 Lite Evaluation Modules
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
    XDS560v2 System Trace USB & Ethernet Debug Probe
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
    XDS560v2 System Trace USB Debug Probe
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • TI Keystone DSP PCIe SerDes IBIS-AMI Models
    PDF, 4.8 Mb, Archivo publicado: oct 9, 2014
    This document describes the organization, structure, and proper usage of the TI serializer and deserializer (SerDes) IBIS-AMI models for Keystone DSP PCIe interface.
  • SerDes Implementation Guidelines for KeyStone I Devices
    PDF, 590 Kb, Archivo publicado: oct 31, 2012
    The goal of KeyStone I SerDes collateral material is to make system implementation easier for the customer by providing the system solution. For these SerDes-based interfaces, it is not assumed that the system designer is familiar with the industry specifications, SerDes technology, or RF/microwave PCB design. However, it is still expected that the PCB design work will be supervised by a knowledge
  • TMS320C66x DSP Generation of Devices (Rev. A)
    PDF, 245 Kb, Revisión: A, Archivo publicado: abr 25, 2011
  • KeyStone I DDR3 Initialization (Rev. E)
    PDF, 114 Kb, Revisión: E, Archivo publicado: oct 28, 2016
    The initialization of the DDR3 DRAM controller on KeyStone I DSPs is straightforward as long as the proper steps are followed. However, if some steps are omitted or if some sequence-sensitive steps are implemented in the wrong order, DDR3 operation will be unpredictable.All DDR3 initialization routines must contain the basic register writes to configure the memory controller within the DSP
  • Hardware Design Guide for KeyStone Devices (Rev. C)
    PDF, 1.7 Mb, Revisión: C, Archivo publicado: sept 15, 2013
  • AN-1281 Bumped Die (Flip Chip) Packages (Rev. A)
    PDF, 2.2 Mb, Revisión: A, Archivo publicado: mayo 1, 2004
    Application Note 1281 Bumped Die (Flip Chip) Packages
  • SERDES Link Commissioning on KeyStone I and II Devices
    PDF, 138 Kb, Archivo publicado: abr 13, 2016
    The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
  • PCIe Use Cases for KeyStone Devices
    PDF, 320 Kb, Archivo publicado: dic 13, 2011
  • Clocking Design Guide for KeyStone Devices
    PDF, 1.5 Mb, Archivo publicado: nov 9, 2010
  • The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
    PDF, 20 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
  • Optimizing Loops on the C66x DSP
    PDF, 585 Kb, Archivo publicado: nov 9, 2010
  • DDR3 Design Requirements for KeyStone Devices (Rev. B)
    PDF, 582 Kb, Revisión: B, Archivo publicado: jun 5, 2014
  • TI DSP Benchmarking
    PDF, 62 Kb, Archivo publicado: enero 13, 2016
    This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
  • Plastic Ball Grid Array [PBGA] Application Note (Rev. B)
    PDF, 1.6 Mb, Revisión: B, Archivo publicado: agosto 13, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors > Processors > Digital Signal Processors > C6000 DSP > C66x DSP