[ /Title
(CD74H
C21,
CD74H
CT21)
/Subject
(High
Speed
CMOS
Logic
Dual 4Input CD54HC21, CD74HC21,
CD74HCT21
Data sheet acquired from Harris Semiconductor
SCHS131C High-Speed CMOS Logic
Dual 4-Input AND Gate August 1997 -Revised September 2003 Features Description Buffered Inputs The ’HC21 and CD74HCT21 logic gates utilize silicon gate
CMOS technology to achieve operating speeds similar to
LSTTL gates with the low power consumption of standard
CMOS integrated circuits. All devices have the ability to drive
10 LSTTL loads. The HCT logic family is functionally pin
compatible with the standard LS logic family. Typical Propagation Delay: 9ns at VCC = 5V,
CL = 15pF, TA = 25oC Fanout (Over Temperature Range)
-Standard Outputs . 10 LSTTL Loads
-Bus Driver Outputs . 15 LSTTL Loads Ordering Information Wide Operating Temperature Range . -55oC to 125oC Balanced Propagation Delay and Transition Times PART NUMBER Significant Power Reduction Compared to LSTTL …
