Datasheet Texas Instruments TLV2543CDBRG4 — Ficha de datos

FabricanteTexas Instruments
SerieTLV2543
Numero de parteTLV2543CDBRG4
Datasheet Texas Instruments TLV2543CDBRG4

12-Bit 66 kSPS ADC Ser.

Hojas de datos

12-Bit Analog-to-Digital Converters With Serial Control And 11 Analog Inputs datasheet
PDF, 553 Kb, Revisión: C, Archivo publicado: jun 5, 2000
Extracto del documento

Precios

Descripción detallada

Out, Pgrrdble Pwrdn, MSB / LSB First, Modo de autocomprobación incorporado, 11 canales. 20-SSOP

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

Pin20
Package TypeDB
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingTV2543
Width (mm)5.3
Length (mm)7.2
Thickness (mm)1.95
Pitch (mm).65
Max Height (mm)2
Mechanical DataDescargar

Paramétricos

# Input Channels11
Analog Voltage AVDD(Max)3.6 V
Analog Voltage AVDD(Min)3 V
ArchitectureSAR
Digital Supply(Max)3.6 V
Digital Supply(Min)3 V
INL(Max)1 +/-LSB
Input Range(Max)3.6 V
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupSSOP
Package Size: mm2:W x L20SSOP: 56 mm2: 7.8 x 7.2(SSOP) PKG
Power Consumption(Typ)3.3 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
Sample Rate (max)66kSPS SPS
Sample Rate(Max)0.066 MSPS

Plan ecológico

RoHSObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)