Datasheet Texas Instruments ADS8472IBRGZTG4 — Ficha de datos

FabricanteTexas Instruments
SerieADS8472
Numero de parteADS8472IBRGZTG4
Datasheet Texas Instruments ADS8472IBRGZTG4

16 bits 1MSPS 0.65 LSB Max INL ADC de precisión con interfaz paralela y referencia 48-VQFN -40 a 85

Hojas de datos

16-Bit 1-MSPS Differential Input, Micropower Samp Analog-to-Digital Converter datasheet
PDF, 1.4 Mb, Archivo publicado: sept 27, 2006
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin484848
Package TypeRGZRGZRGZ
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY250250250
CarrierSMALL T&RSMALL T&RSMALL T&R
Device MarkingADS8472IB
Width (mm)777
Length (mm)777
Thickness (mm).9.9.9
Pitch (mm).5.5.5
Max Height (mm)111
Mechanical DataDescargarDescargarDescargar

Paramétricos

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)0.65 +/-LSB
Input Range(Max)4.096 V
Input Range(Min)4.096 V
Input TypeDifferential
Integrated FeaturesOscillator
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L48VQFN: 49 mm2: 7 x 7(VQFN) PKG
Power Consumption(Typ)225 mW
RatingCatalog
Reference ModeExt,Int
Resolution16 Bits
SINAD95.2 dB
SNR95.3 dB
Sample Rate (max)1MSPS SPS
Sample Rate(Max)1 MSPS
THD(Typ)-121 dB

Plan ecológico

RoHSObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)