Datasheet Texas Instruments SN74ALVCH16244KR — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74ALVCH16244 |
| Numero de parte | SN74ALVCH16244KR |
Memoria intermedia / controlador de 16 bits con salidas de 3 estados MICROSTAR DE 56 BGA JUNIOR -40 a 85
Hojas de datos
SN74ALVCH16244 datasheet
PDF, 941 Kb, Revisión: K, Archivo publicado: agosto 26, 2005
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 56 |
| Package Type | GQL |
| Industry STD Term | BGA MICROSTAR JUNIOR |
| JEDEC Code | R-PBGA-N |
| Width (mm) | 4.5 |
| Length (mm) | 7 |
| Thickness (mm) | .75 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1 |
| Mechanical Data | Descargar |
Reemplazos
| Replacement | 74ALVCH16244ZQLR |
| Replacement Code | P |
Paramétricos
| Approx. Price (US$) | 0.65 | 1ku |
| Bits(#) | 16 |
| F @ Nom Voltage(Max)(Mhz) | 100 |
| ICC @ Nom Voltage(Max)(mA) | 0.04 |
| Input Type | LVTTL |
| Operating Temperature Range(C) | -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | -24/24 |
| Output Type | LVTTL |
| Package Group | BGA MICROSTAR JUNIOR |
| Package Size: mm2:W x L (PKG) | 56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ALVC |
| VCC(Max)(V) | 3.6 |
| VCC(Min)(V) | 1.65 |
| Voltage(Nom)(V) | 1.8 2.5 2.7 3.3 |
| tpd @ Nom Voltage(Max)(ns) | 3.7 3.6 3 |
Plan ecológico
| RoHS | Desobediente |
| Pb gratis | No |
Notas de aplicación
- Timing Differences of 10-pF Versus 50pF LoadingPDF, 47 Kb, Archivo publicado: nov 1, 1996
The 'ALVCH16244 is a 16-bit advanced low voltage CMOS (ALVC) unidirectional driver. Typically, data sheet values for tpd, ten, and tdis are characterized under a 50-pF capacitive load with a temperature range of -40?C to 85?C. At times these drivers are used in memory addressing for dual in-line memory modules (DIMM) with a 10-pF load and and temperature range of 0?C to 70?C. This document provide - TI SN74ALVC16835 Component Specification Analysis for PC100PDF, 43 Kb, Archivo publicado: agosto 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T - Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large - Bus-Hold CircuitPDF, 418 Kb, Archivo publicado: feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
Linea modelo
Serie: SN74ALVCH16244 (10)
Clasificación del fabricante
- Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver