Datasheet Texas Instruments SN74LVT574PWR — Ficha de datos

FabricanteTexas Instruments
SerieSN74LVT574
Numero de parteSN74LVT574PWR
Datasheet Texas Instruments SN74LVT574PWR

Chanclas de tipo D de 3,3 V V con borde octal activadas por borde con salidas de 3 estados 20-TSSOP -40 a 85

Hojas de datos

3.3-V ABT Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet
PDF, 837 Kb, Revisión: D, Archivo publicado: jul 1, 1995
Extracto del documento

Precios

Estado

Estado del ciclo de vidaNRND (No recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin20
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingLX574
Width (mm)4.4
Length (mm)6.5
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical DataDescargar

Reemplazos

ReplacementSN74LVTH574PWR
Replacement CodeQ

Plan ecológico

RoHSObediente

Notas de aplicación

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Archivo publicado: dic 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop