Datasheet Texas Instruments TLV1578CDARG4 — Ficha de datos

FabricanteTexas Instruments
SerieTLV1578
Numero de parteTLV1578CDARG4
Datasheet Texas Instruments TLV1578CDARG4

8-ch. 10 bits 1.25 MSPS ADC 8 canales, DSP / SPI, configurable por hardware, baja potencia 32-TSSOP 0 a 70

Hojas de datos

2.7 V to 5.5 V, 1-/-8 Channel 10-Bit Parallel Analog-to-Digital Converters datasheet
PDF, 627 Kb, Revisión: D, Archivo publicado: jul 11, 2000
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin32
Package TypeDA
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingTLV1578
Width (mm)6.2
Length (mm)11
Thickness (mm)1.15
Pitch (mm).65
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

# Input Channels8
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeSingle-Ended
Integrated FeaturesOscillator
InterfaceParallel
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85,0 to 70 C
Package GroupTSSOP
Package Size: mm2:W x L32TSSOP: 89 mm2: 8.1 x 11(TSSOP) PKG
Power Consumption(Typ)12 mW
RatingCatalog
Reference ModeExt
Resolution10 Bits
SINAD60 dB
SNR60 dB
Sample Rate (max)1.25MSPS SPS
Sample Rate(Max)1.25 MSPS
THD(Typ)-60 dB

Plan ecológico

RoHSObediente

Notas de aplicación

  • Interfacing the TLV1571/78 Analog-to-Digital Converter to the TMS320C542 DSP
    PDF, 192 Kb, Archivo publicado: oct 7, 1999
    This application report presents a hardware solution for interfacing the TLV1571/TLV1578 10-bit, 1.25 MSPS low-power analog-to-digital converter (ADC) to the 16-bit fixed-point TMS320C542 digital signal processor (DSP). The report describes the interface hardware and C-callable software routines, which support communication between ADC and DSP.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)