Datasheet Texas Instruments SN74LVT125QDRQ1 — Ficha de datos

FabricanteTexas Instruments
SerieSN74LVT125-Q1
Numero de parteSN74LVT125QDRQ1
Datasheet Texas Instruments SN74LVT125QDRQ1

Catálogo automotriz Búfers de bus cuádruple ABT de 3.3 V con salidas de 3 estados 14-SOIC -40 a 125

Hojas de datos

3.3-V ABT Quadruple Bus Buffer With 3-State Outputs datasheet
PDF, 793 Kb, Revisión: B, Archivo publicado: abr 9, 2008
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin14
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingLVT125Q
Width (mm)3.91
Length (mm)8.65
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical DataDescargar

Paramétricos

Bits4
F @ Nom Voltage(Max)100 Mhz
ICC @ Nom Voltage(Max)0.007 mA
Operating Temperature Range-40 to 125 C
Output Drive (IOL/IOH)(Max)-32/32 mA
Package GroupSOIC
Package Size: mm2:W x L14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG
RatingAutomotive
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
Voltage(Nom)3.3 V
tpd @ Nom Voltage(Max)4.2 ns

Plan ecológico

RoHSObediente

Notas de aplicación

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Archivo publicado: dic 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver