Datasheet Texas Instruments SN74LVC112ADGVR — Ficha de datos

FabricanteTexas Instruments
SerieSN74LVC112A
Numero de parteSN74LVC112ADGVR
Datasheet Texas Instruments SN74LVC112ADGVR

Flip-Flop JK de doble filo de borde negativo con 16-TVSOP claros y preestablecidos -40 a 125

Hojas de datos

SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset datasheet
PDF, 980 Kb, Revisión: M, Archivo publicado: dic 26, 2014
Extracto del documento

Notas de aplicación

  • LVC Characterization Information
    PDF, 114 Kb, Archivo publicado: dic 1, 1996
    This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices.
  • Use of the CMOS Unbuffered Inverter in Oscillator Circuits
    PDF, 796 Kb, Archivo publicado: nov 6, 2003
    CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly

Linea modelo

Clasificación del fabricante

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop