Datasheet Texas Instruments SN74LV125ADBR — Ficha de datos

Product
Folder Sample &
Buy Support &
Community Tools &
Software Technical
Documents SN74LV125A
SCES124N – DECEMBER 1997 – REVISED JANUARY 2016 SN74LV125A Quadruple Bus Buffer Gates With 3-State Outputs
1 Features 2 Applications 1 2-V to 5.5-V VCC Operation
Max tpd of 6 ns at 5 V
Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25В°C
Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25В°C
Support Mixed-Mode Voltage Operation on
All Ports
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 4000-V Human-Body Model
– 200-V Machine Model
– 2000-V Charged-Device Model Flow Meters
Solid State Drives (SSDs): Enterprise …