Datasheet Texas Instruments TLC5540IPWR — Ficha de datos

FabricanteTexas Instruments
SerieTLC5540
Numero de parteTLC5540IPWR
Datasheet Texas Instruments TLC5540IPWR

Convertidor analógico a digital (ADC) de 8 bits y 40 MSPS 24-TSSOP -40 a 85

Hojas de datos

TLC5540: 8-Bit High-Speed Analog-to-Digital Converter datasheet
PDF, 867 Kb, Revisión: D, Archivo publicado: abr 19, 2004
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin24
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingY5540
Width (mm)4.4
Length (mm)7.8
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

# Input Channels1
Analog Input BW75 MHz
ArchitectureFlash
DNL(Typ)0.2 +/-LSB
ENOB6.8 Bits
INL(Typ)0.6 +/-LSB
Input BufferNo
Input Range2 Vp-p
InterfaceParallel CMOS
Operating Temperature Range-40 to 85,0 to 70 C
Package GroupTSSOP
Package Size: mm2:W x L24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) PKG
Power Consumption(Typ)85 mW
RatingCatalog
Reference ModeExt
Resolution8 Bits
SFDR42 dB
SINAD43.3 dB
SNR44 dB
Sample Rate(Max)40 MSPS

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: TLC5540EVM
    TLC5540 8-Bit, 40-MSPS Analog-to-Digital Converter Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Interfacing the TLC5540 Analog To Digital Converter to the TMS320C203-80 DSP
    PDF, 763 Kb, Archivo publicado: marzo 1, 1998
    CMOS analog-to-digital converters (ADCs) are used as basic building blocks in many types of data acquisition systems.This application report describes the interface between the high-speed Texas Instruments (TI?TLC5540 8-bit parallel-output ADC and the TI TMS320C203-80 digital signal processor (DSP). The 8-bit resolution ADC can operate at a rate of up to 40MSa/s (megasamples per second). On-ch
  • Interfacing A/D Converters TLC5540/10 to the DSKplus DSP Starter Kit TMS320C54x
    PDF, 206 Kb, Archivo publicado: abr 1, 1997
    This Application Note describes the construction of a test circuit using the A/D converters TLC5540 and TLC5510, and alternative ways of interfacing these converters to the DSKplus DSP starter kit TMS320C54x. Details are given of the test circuit of the TLC5540/10 and of the interface, and the programming of the digital signal processor TMS320C54x is also described.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)