Datasheet Texas Instruments ADS8341E/2K5G4 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADS8341 |
| Numero de parte | ADS8341E/2K5G4 |
Convertidor analógico a digital de muestreo de salida serie de 4 canales y 16 bits 16-SSOP -40 a 85
Hojas de datos
ADS8341: 16-Bit, 4-Channel Serial Output Sampling Analog-To-Digital Converter datasheet
PDF, 1.4 Mb, Revisión: D, Archivo publicado: abr 15, 2003
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 16 | 16 |
| Package Type | DBQ | DBQ |
| Industry STD Term | SSOP | SSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 2500 | 2500 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | ADS | 8341E |
| Width (mm) | 3.9 | 3.9 |
| Length (mm) | 4.9 | 4.9 |
| Thickness (mm) | 1.5 | 1.5 |
| Pitch (mm) | .64 | .64 |
| Max Height (mm) | 1.75 | 1.75 |
| Mechanical Data | Descargar | Descargar |
Paramétricos
| # Input Channels | 4 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 6 +/-LSB |
| Input Range(Max) | 5.25 V |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | N/A |
| Interface | Serial |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SSOP |
| Package Size: mm2:W x L | 16SSOP: 19 mm2: 3.9 x 4.9(SSOP) PKG |
| Power Consumption(Typ) | 3.2 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 16 Bits |
| SINAD | N/A dB |
| SNR | 86 dB |
| Sample Rate (max) | 100kSPS SPS |
| Sample Rate(Max) | 0.1 MSPS |
| THD(Typ) | -90 dB |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Linea modelo
Serie: ADS8341 (8)
- ADS8341E ADS8341E/2K5 ADS8341E/2K5G4 ADS8341EB ADS8341EB/2K5 ADS8341EB/2K5G4 ADS8341EBG4 ADS8341EG4
Clasificación del fabricante
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)