Datasheet Texas Instruments SN74AUP1G125DRYR — Ficha de datos

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Design SN74AUP1G125
SCES595N – JULY 2004 – REVISED JULY 2017 SN74AUP1G125 Low-Power Single Bus Buffer Gate With 3-State Output
1 Features 3 Description The SN74AUP1G125 bus buffer gate is a single line
driver with a 3-state output. The output is disabled
when the output-enable (OE) input is high. This
device has the input-disable feature, which allows
floating input signals. 1 Available in the Texas Instruments NanoStarв„ў
Package
Low Static-Power Consumption
(ICC = 0.9 ВµA Maximum)
Low Dynamic-Power Consumption
(Cpd = 4 pF Typical at 3.3 V)
Low Input Capacitance (CI = 1.5 pF Typical)
Low Noise – Overshoot and Undershoot
< 10% of VCC
Input-Disable Feature Allows Floating Input
Conditions …