Datasheet Texas Instruments 74ACT11257 — Ficha de datos

FabricanteTexas Instruments
Serie74ACT11257
Datasheet Texas Instruments 74ACT11257

Selectores / multiplexores de datos cuádruples de 2 líneas a 1 línea con salidas de 3 estados

Hojas de datos

Quadruple 2-Line To 1-Line Data Selector/Multiplexer With 3-State Outputs datasheet
PDF, 1.0 Mb, Revisión: B, Archivo publicado: abr 1, 1996
Extracto del documento

Precios

Estado

74ACT11257DW74ACT11257DWR74ACT11257PW
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

74ACT11257DW74ACT11257DWR74ACT11257PW
N123
Pin202020
Package TypeDWDWPW
Industry STD TermSOICSOICTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25200070
CarrierTUBELARGE T&RTUBE
Device MarkingACT11257ACT11257AT257
Width (mm)7.57.54.4
Length (mm)12.812.86.5
Thickness (mm)2.352.351
Pitch (mm)1.271.27.65
Max Height (mm)2.652.651.2
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / Models74ACT11257DW
74ACT11257DW
74ACT11257DWR
74ACT11257DWR
74ACT11257PW
74ACT11257PW
Bandwidth, MHz100100100
Bits222
Number of Channels444
Configuration2:12:12:1
Digital input leakage(Max), uA555
ESD Charged Device Model, kV0.750.750.75
ESD HBM, kV222
F @ Nom Voltage(Max), Mhz909090
FunctionEncoder/MultiplexerEncoder/MultiplexerEncoder/Multiplexer
ICC @ Nom Voltage(Max), mA0.080.080.08
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-24
Package GroupSOICSOICTSSOP
Package Size: mm2:W x L, PKG20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
RatingCatalogCatalogCatalog
Schmitt TriggerNoNoNo
Technology FamilyACTACTACT
Type3-State Output3-State Output3-State Output
VCC(Max), V5.55.55.5
VCC(Min), V4.54.54.5
Voltage(Nom), V555
tpd @ Nom Voltage(Max), ns888

Plan ecológico

74ACT11257DW74ACT11257DWR74ACT11257PW
RoHSObedienteObedienteObediente

Notas de aplicación

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Introduction to Logic
    PDF, 93 Kb, Archivo publicado: abr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revisión: D, Archivo publicado: jun 23, 2016
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Archivo publicado: jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, Archivo publicado: agosto 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

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Clasificación del fabricante

  • Semiconductors> Switches and Multiplexers> Buffered Encoders and Decoders