Datasheet Texas Instruments 74ACT11374 — Ficha de datos

FabricanteTexas Instruments
Serie74ACT11374
Datasheet Texas Instruments 74ACT11374

Chanclas O-Type de tipo D activadas por borde con salidas de 3 estados

Hojas de datos

Octal D-Type Edge-Triggered Flip-Flop With 3-State Outputs datasheet
PDF, 826 Kb, Revisión: A, Archivo publicado: abr 1, 1996
Extracto del documento

Precios

Estado

74ACT11374DBLE74ACT11374DW74ACT11374DWG474ACT11374DWR
Estado del ciclo de vidaObsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNo

Embalaje

74ACT11374DBLE74ACT11374DW74ACT11374DWG474ACT11374DWR
N1234
Pin24242424
Package TypeDBDWDWDW
Industry STD TermSSOPSOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Width (mm)5.37.57.57.5
Length (mm)8.215.415.415.4
Thickness (mm)1.952.352.352.35
Pitch (mm).651.271.271.27
Max Height (mm)22.652.652.65
Mechanical DataDescargarDescargarDescargarDescargar
Package QTY25252000
CarrierTUBETUBELARGE T&R
Device MarkingACT11374ACT11374ACT11374

Paramétricos

Parameters / Models74ACT11374DBLE
74ACT11374DBLE
74ACT11374DW
74ACT11374DW
74ACT11374DWG4
74ACT11374DWG4
74ACT11374DWR
74ACT11374DWR
3-State OutputYesYesYesYes
Approx. Price (US$)1.64 | 1ku
Bits888
Bits(#)8
F @ Nom Voltage(Max), Mhz909090
F @ Nom Voltage(Max)(Mhz)90
ICC @ Nom Voltage(Max), mA0.080.080.08
ICC @ Nom Voltage(Max)(mA)0.08
Input TypeTTL
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-24
Output Drive (IOL/IOH)(Max)(mA)24/-24
Output TypeCMOS
Package GroupSOSOICSOICSOIC
Package Size: mm2:W x L, PKG24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24SOIC: 160 mm2: 10.3 x 15.5(SOIC)24SOIC: 160 mm2: 10.3 x 15.5(SOIC)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyACTACTACTACT
VCC(Max), V5.55.55.5
VCC(Max)(V)5.5
VCC(Min), V4.54.54.5
VCC(Min)(V)4.5
Voltage(Nom), V555
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max), ns131313
tpd @ Nom Voltage(Max)(ns)13

Plan ecológico

74ACT11374DBLE74ACT11374DW74ACT11374DWG474ACT11374DWR
RoHSDesobedienteObedienteObedienteObediente
Pb gratisNo

Notas de aplicación

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    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
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  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Archivo publicado: jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, Archivo publicado: agosto 29, 2002
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  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop