Datasheet Texas Instruments ADS5281 — Ficha de datos

FabricanteTexas Instruments
SerieADS5281
Datasheet Texas Instruments ADS5281

Convertidor analógico a digital (ADC) de ocho canales, 12 bits y 50 MSPS

Hojas de datos

12-Bit Octal-Channel ADC Family Up to 65MSPS. datasheet
PDF, 1.6 Mb, Revisión: I, Archivo publicado: jun 1, 2012
Extracto del documento

Precios

Estado

ADS5281IPFPADS5281IPFPRADS5281IRGCRADS5281IRGCT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNo

Embalaje

ADS5281IPFPADS5281IPFPRADS5281IRGCRADS5281IRGCT
N1234
Pin80806464
Package TypePFPPFPRGCRGC
Industry STD TermHTQFPHTQFPVQFNVQFN
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-NS-PQFP-N
Package QTY9610002000250
CarrierJEDEC TRAY (10+1)LARGE T&RLARGE T&RSMALL T&R
Device MarkingADS5281IADS5281IAZ5281AZ5281
Width (mm)121299
Length (mm)121299
Thickness (mm)11.88.88
Pitch (mm).5.5.5.5
Max Height (mm)1.21.211
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsADS5281IPFP
ADS5281IPFP
ADS5281IPFPR
ADS5281IPFPR
ADS5281IRGCR
ADS5281IRGCR
ADS5281IRGCT
ADS5281IRGCT
# Input Channels8888
Analog Input BW, MHz520520520520
ArchitecturePipelinePipelinePipelinePipeline
DNL(Max), +/-LSB0.750.750.750.75
DNL(Typ), +/-LSB0.250.250.250.25
ENOB, Bits11.311.311.311.3
INL(Max), +/-LSB1.51.51.51.5
INL(Typ), +/-LSB0.70.70.70.7
Input BufferNoNoNoNo
Input Range, Vp-p2222
InterfaceParallel LVDSParallel LVDSParallel LVDSParallel LVDS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupHTQFPHTQFPVQFNVQFN
Package Size: mm2:W x L, PKG80HTQFP: 196 mm2: 14 x 14(HTQFP)80HTQFP: 196 mm2: 14 x 14(HTQFP)64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)
Power Consumption(Typ), mW512512512512
RatingCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,Int
Resolution, Bits12121212
SFDR, dB85858585
SINAD, dB69.769.769.769.7
SNR, dB70707070
Sample Rate(Max), MSPS50505050

Plan ecológico

ADS5281IPFPADS5281IPFPRADS5281IRGCRADS5281IRGCT
RoHSObedienteObedienteObedienteObediente

Notas de aplicación

  • Understanding Serial LVDS Capture in High-Speed ADCs
    PDF, 1.6 Mb, Archivo publicado: jul 10, 2013
    This application note describes various schemes of interfacing serialized low-voltage differential signaling (LVDS) data outputs from high-speed analog-to-digital converters (ADCs) to a field-programmable gate arrays (FPGAs) or other application-specific integrated circuit (ASIC)-based receivers. This note provides an introduction to standard one-wire interfaces and other interface variants (such
  • QFN Layout Guidelines
    PDF, 1.3 Mb, Archivo publicado: jul 28, 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revisión: A, Archivo publicado: mayo 22, 2015
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revisión: A, Archivo publicado: jul 19, 2013
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)