Datasheet Texas Instruments ADS5400-SP — Ficha de datos

FabricanteTexas Instruments
SerieADS5400-SP
Datasheet Texas Instruments ADS5400-SP

Convertidor analógico a digital (ADC) 1.0-GSPS de 12 bits

Hojas de datos

12-Bit, 1-GSPS Analog-to-Digital Converter. datasheet
PDF, 1.1 Mb, Revisión: D, Archivo publicado: enero 2, 2014
Extracto del documento

Precios

Estado

5962-0924001VXCADS5400HFS/EMADS5400MHFSV
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

5962-0924001VXCADS5400HFS/EMADS5400MHFSV
N123
Pin100100100
Package TypeHFSHFSHFS
Industry STD TermCFP (TBAR)CFP (TBAR)CFP (TBAR)
JEDEC CodeS-CQFP-FS-CQFP-FS-CQFP-F
Package QTY111
Width (mm)19.0519.0519.05
Length (mm)19.0519.0519.05
Thickness (mm)2.822.822.82
Pitch (mm)0.5.5.5
Max Height (mm)3.153.153.15
Mechanical DataDescargarDescargarDescargar
Device MarkingEVAL ONLYADS5400MHFSV

Paramétricos

Parameters / Models5962-0924001VXC
5962-0924001VXC
ADS5400HFS/EM
ADS5400HFS/EM
ADS5400MHFSV
ADS5400MHFSV
# Input Channels111
Analog Voltage AVDD(Max), V3.4653.4653.465
Analog Voltage AVDD(Min), V3.1353.1353.135
ArchitecturePipelinePipelinePipeline
Digital Supply(Max), V3.4653.4653.465
Digital Supply(Min), V3.1353.1353.135
ENOB, Bits9.29.29.2
INL(Max), +/-LSB4.54.54.5
INL(Typ), +/-LSB1.51.51.5
InterfaceParallel LVDSParallel LVDSParallel LVDS
Operating Temperature Range, C-55 to 125,25 Only-55 to 125,25 Only-55 to 125,25 Only
Package GroupCFPCFPCFP
Package Size: mm2:W x L, PKGSee datasheet (CFP)See datasheet (CFP)See datasheet (CFP)
Power Consumption(Typ), mW220022002200
RatingSpaceSpaceSpace
Reference ModeExt,IntExt,IntExt,Int
Resolution, Bits121212
SFDR, dB727272
SNR, dB58.558.558.5
Sample Rate (max), SPS1GSPS1GSPS

Plan ecológico

5962-0924001VXCADS5400HFS/EMADS5400MHFSV
RoHSSee ti.comSee ti.comSee ti.com

Notas de aplicación

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.

Linea modelo

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters