Datasheet Texas Instruments ADS6244 — Ficha de datos

FabricanteTexas Instruments
SerieADS6244
Datasheet Texas Instruments ADS6244

Convertidor analógico a digital de doble canal, 14 bits, 105-MSPS (ADC)

Hojas de datos

Datasheet
Dual Channel 14bit, 125/105/80 MSPS ADC with Serial LVDS Interface datasheet
PDF, 3.4 Mb, Revisión: B, Archivo publicado: dic 20, 2013
Extracto del documento

Precios

Estado

ADS6244IRGZRADS6244IRGZRG4ADS6244IRGZT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

ADS6244IRGZRADS6244IRGZRG4ADS6244IRGZT
N123
Pin484848
Package TypeRGZRGZRGZ
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY25002500250
CarrierLARGE T&RLARGE T&RSMALL T&R
Device MarkingAZ6244AZ6244AZ6244
Width (mm)777
Length (mm)777
Thickness (mm).9.9.9
Pitch (mm).5.5.5
Max Height (mm)111
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / ModelsADS6244IRGZR
ADS6244IRGZR
ADS6244IRGZRG4
ADS6244IRGZRG4
ADS6244IRGZT
ADS6244IRGZT
# Input Channels222
Analog Input BW, MHz500500
Analog Input BW(MHz)500
Approx. Price (US$)56.16 | 1ku
ArchitecturePipelinePipelinePipeline
DNL(Max), +/-LSB2.52.5
DNL(Max)(+/-LSB)2.5
DNL(Typ), +/-LSB0.60.6
ENOB, Bits11.711.7
ENOB(Bits)11.7
INL(Max), +/-LSB55
INL(Max)(+/-LSB)5
INL(Typ), +/-LSB33
Input BufferNoNo
Input Range, Vp-p22V (p-p)2
InterfaceSerial LVDSParallel LVDS
Serial SPI Interface
Serial LVDS
Operating Temperature Range, C-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Package GroupVQFNVQFNVQFN
Package Size(mm2=WxL)48VQFN: 49 mm2: 7 x 7
Package Size: mm2:W x L, PKG48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)
Power Consumption(Typ), mW900900
Power Consumption(Typ)(mW)900
RatingCatalogCatalogCatalog
Reference ModeExt,IntInt
Ext
Ext,Int
Resolution, Bits1414
Resolution(Bits)14
SFDR, dB8181
SFDR(dB)81
SINAD, dB7272
SINAD(dB)72
SNR, dB7373
SNR(dB)73
Sample Rate (max)(SPS)105MSPS
Sample Rate(Max), MSPS105105

Plan ecológico

ADS6244IRGZRADS6244IRGZRG4ADS6244IRGZT
RoHSObedienteObedienteObediente
Pb gratis

Notas de aplicación

  • Band-Pass Filter Design Techniques for High-Speed ADCs
    PDF, 733 Kb, Archivo publicado: feb 27, 2012
    Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the
  • QFN Layout Guidelines
    PDF, 1.3 Mb, Archivo publicado: jul 28, 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revisión: A, Archivo publicado: mayo 22, 2015
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revisión: A, Archivo publicado: jul 19, 2013
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • QFN and SON PCB Attachment (Rev. B)
    PDF, 821 Kb, Revisión: B, Archivo publicado: agosto 24, 2018
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)