Datasheet Texas Instruments ADS805 — Ficha de datos

Fabricante	Texas Instruments
Serie	ADS805

Hojas de datos

Precios

Estado

Embalaje

Paramétricos

Parameters / Models	ADS805E	ADS805E/1K	ADS805EG4	ADS805U	ADS805U/1K
# Input Channels	1	1	1	1	1
Analog Input BW, MHz	270	270
Analog Input BW(MHz)			270	270	270
Approx. Price (US$)			11.95 | 1ku	11.95 | 1ku	11.95 | 1ku
Architecture	Pipeline	Pipeline	Pipeline	Pipeline	Pipeline
DNL(Max), +/-LSB	0.75	0.75
DNL(Max)(+/-LSB)			0.75	0.75	0.75
DNL(Typ), +/-LSB	0.25	0.25
ENOB, Bits	10.7	10.7
ENOB(Bits)			0.25	0.25	0.25
INL(Max), +/-LSB	2	2
INL(Max)(+/-LSB)			1	1	1
INL(Typ), +/-LSB	1	1
Input Buffer	No	No		No	No
Input Range	2,5	2,5	2V / 5V(p-p)	2V / 5V(p-p)	2V / 5V(p-p)
Interface	Parallel CMOS	Parallel CMOS	Parallel CMOS	Parallel CMOS	Parallel CMOS
Operating Temperature Range, C	-40 to 85	-40 to 85
Operating Temperature Range(C)			-40 to 85	-40 to 85	-40 to 85
Package Group	SSOP	SSOP	SSOP	SSOP	SSOP
Package Size(mm2=WxL)			28SSOP: 80 mm2: 7.8 x 10.2
Package Size: mm2:W x L, PKG	28SSOP: 80 mm2: 7.8 x 10.2(SSOP)	28SSOP: 80 mm2: 7.8 x 10.2(SSOP)
Package Size: mm2:W x L (PKG)				28SSOP: 80 mm2: 7.8 x 10.2(SSOP)	28SSOP: 80 mm2: 7.8 x 10.2(SSOP)
Power Consumption(Typ), mW	300	300
Power Consumption(Typ)(mW)			300	300	300
Rating	Catalog	Catalog	Catalog	Catalog	Catalog
Reference Mode	Ext,Int	Ext,Int	Int Ext	Ext Int	Ext Int
Resolution, Bits	12	12
Resolution(Bits)			12	12	12
SFDR, dB	74	74
SFDR(dB)			74	74	74
SINAD, dB	66	66
SINAD(dB)			66	66	66
SNR, dB	68	68
SNR(dB)			68	68	68
Sample Rate (max)(SPS)			20MSPS
Sample Rate(Max), MSPS	20	20
Sample Rate(Max)(MSPS)				20	20

Plan ecológico

Notas de aplicación

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  TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
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  PDF, 376 Kb, Archivo publicado: abr 28, 2009
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  Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
  PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
  This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
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  PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
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• Descargar
  CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
  PDF, 424 Kb, Archivo publicado: jun 8, 2008
  Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
• Descargar
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
• Descargar
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  PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
• Descargar
  Interleaving Analog-to-Digital Converters
  PDF, 64 Kb, Archivo publicado: oct 2, 2000
  It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration several possible sources of error.
• Descargar
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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  What Designers Should Know About Data Converter Drift
  PDF, 95 Kb, Archivo publicado: oct 2, 2000
  Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its operating-temperature extremes, perhaps only to 9 or even 8 bits. But for lack of more precise knowledge, many play it safe (and expensive) and overspecify.

Linea modelo

Clasificación del fabricante

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)