Datasheet Texas Instruments CD54HCT165 — Ficha de datos

FabricanteTexas Instruments
SerieCD54HCT165
Datasheet Texas Instruments CD54HCT165

Registro de desplazamiento de 8 bits de entrada / salida serie paralela CMOS Logic de alta velocidad

Hojas de datos

CD54HC165, CD74HC165, CD54HCT165, CD74HCT165 datasheet
PDF, 830 Kb, Revisión: C, Archivo publicado: oct 13, 2003
Extracto del documento

Precios

Estado

5962-8685501EACD54HCT165F3A
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

5962-8685501EACD54HCT165F3A
N12
Pin1616
Package TypeJJ
Industry STD TermCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-T
Package QTY11
CarrierTUBETUBE
Width (mm)6.926.92
Length (mm)19.5619.56
Thickness (mm)4.574.57
Pitch (mm)2.542.54
Max Height (mm)5.085.08
Mechanical DataDescargarDescargar
Device Marking5962-8685501EA

Paramétricos

Parameters / Models5962-8685501EA
5962-8685501EA
CD54HCT165F3A
CD54HCT165F3A
3-State OutputNoNo
Bits88
F @ Nom Voltage(Max), Mhz2525
ICC @ Nom Voltage(Max), mA0.080.08
Input TypeTTLTTL
Operating Temperature Range, C-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA4/-44/-4
Output TypeCMOSCMOS
Package GroupCDIPCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CDIP)
RatingMilitaryMilitary
Technology FamilyHCTHCT
VCC(Max), V5.55.5
VCC(Min), V4.54.5
tpd @ Nom Voltage(Max), ns5050

Plan ecológico

5962-8685501EACD54HCT165F3A
RoHSSee ti.comSee ti.com

Notas de aplicación

  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, Archivo publicado: mayo 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, Archivo publicado: agosto 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Archivo publicado: jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Introduction to Logic
    PDF, 93 Kb, Archivo publicado: abr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revisión: D, Archivo publicado: jun 23, 2016
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Serie: CD54HCT165 (2)

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers