Datasheet Texas Instruments CD74AC00 — Ficha de datos

FabricanteTexas Instruments
SerieCD74AC00
Datasheet Texas Instruments CD74AC00

Puertas NAND Quad de 2 entradas

Hojas de datos

Quadruple 2-Input Positive-NAND Gates datasheet
PDF, 981 Kb, Revisión: C, Archivo publicado: jun 12, 2002
Extracto del documento

Precios

Estado

CD74AC00ECD74AC00EE4CD74AC00MCD74AC00M96CD74AC00MG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNo

Embalaje

CD74AC00ECD74AC00EE4CD74AC00MCD74AC00M96CD74AC00MG4
N12345
Pin1414141414
Package TypeNNDDD
Industry STD TermPDIPPDIPSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252550250050
CarrierTUBETUBETUBELARGE T&RTUBE
Device MarkingCD74AC00ECD74AC00EAC00MAC00MAC00M
Width (mm)6.356.353.913.913.91
Length (mm)19.319.38.658.658.65
Thickness (mm)3.93.91.581.581.58
Pitch (mm)2.542.541.271.271.27
Max Height (mm)5.085.081.751.751.75
Mechanical DataDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsCD74AC00E
CD74AC00E
CD74AC00EE4
CD74AC00EE4
CD74AC00M
CD74AC00M
CD74AC00M96
CD74AC00M96
CD74AC00MG4
CD74AC00MG4
Bits44444
F @ Nom Voltage(Max), Mhz100100100100100
ICC @ Nom Voltage(Max), mA0.080.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-24
Package GroupPDIPPDIPSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyACACACACAC
VCC(Max), V5.55.55.55.55.5
VCC(Min), V1.51.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns83,9.3,6.683,9.3,6.683,9.3,6.683,9.3,6.683,9.3,6.6

Plan ecológico

CD74AC00ECD74AC00EE4CD74AC00MCD74AC00M96CD74AC00MG4
RoHSObedienteObedienteObedienteObedienteObediente
Pb gratis

Notas de aplicación

  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Gate> NAND Gate