Datasheet Texas Instruments CD74HCT7046A — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CD74HCT7046A |
Bucle de sincronización de fase lógica CMOS de alta velocidad con VCO y detector de bloqueo
Hojas de datos
CD74HC7046A, CD74HCT7046A datasheet
PDF, 479 Kb, Revisión: C, Archivo publicado: oct 16, 2003
Extracto del documento
Precios
Estado
| CD74HCT7046AE | CD74HCT7046AEE4 | CD74HCT7046AM | CD74HCT7046AM96 | CD74HCT7046AMG4 | CD74HCT7046AMT | |
|---|---|---|---|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No | No | No | No | No | No |
Embalaje
| CD74HCT7046AE | CD74HCT7046AEE4 | CD74HCT7046AM | CD74HCT7046AM96 | CD74HCT7046AMG4 | CD74HCT7046AMT | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 16 | 16 | 16 | 16 | 16 | 16 |
| Package Type | N | N | D | D | D | D |
| Industry STD Term | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
| JEDEC Code | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 40 | 2500 | 40 | 250 |
| Carrier | TUBE | TUBE | TUBE | LARGE T&R | TUBE | SMALL T&R |
| Device Marking | CD74HCT7046AE | CD74HCT7046AE | HCT7046AM | HCT7046AM | HCT7046AM | HCT7046AM |
| Width (mm) | 6.35 | 6.35 | 3.91 | 3.91 | 3.91 | 3.91 |
| Length (mm) | 19.3 | 19.3 | 9.9 | 9.9 | 9.9 | 9.9 |
| Thickness (mm) | 3.9 | 3.9 | 1.58 | 1.58 | 1.58 | 1.58 |
| Pitch (mm) | 2.54 | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 |
| Max Height (mm) | 5.08 | 5.08 | 1.75 | 1.75 | 1.75 | 1.75 |
| Mechanical Data | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar |
Paramétricos
| Parameters / Models | CD74HCT7046AE | CD74HCT7046AEE4 | CD74HCT7046AM | CD74HCT7046AM96 | CD74HCT7046AMG4 | CD74HCT7046AMT |
|---|---|---|---|---|---|---|
| Bits | 1 | 1 | 1 | 1 | 1 | 1 |
| F @ Nom Voltage(Max), Mhz | 25 | 25 | 25 | 25 | 25 | 25 |
| ICC @ Nom Voltage(Max), mA | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 |
| Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 |
| Output Drive (IOL/IOH)(Max), mA | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 |
| Package Group | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
| Package Size: mm2:W x L, PKG | See datasheet (PDIP) | See datasheet (PDIP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Technology Family | HCT | HCT | HCT | HCT | HCT | HCT |
| VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| VCC(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
| Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | 5 |
| tpd @ Nom Voltage(Max), ns | 56 | 56 | 56 | 56 | 56 | 56 |
Plan ecológico
| CD74HCT7046AE | CD74HCT7046AEE4 | CD74HCT7046AM | CD74HCT7046AM96 | CD74HCT7046AMG4 | CD74HCT7046AMT | |
|---|---|---|---|---|---|---|
| RoHS | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente |
| Pb gratis | Sí | Sí |
Notas de aplicación
- CMOS Phase-Locked-Loop Applications (Rev. B)PDF, 687 Kb, Revisión: B, Archivo publicado: sept 19, 2002
Applications of the HC/HCT4046A phase-locked loop (PLL) and HC/HCT7046A PLL with lock detection are provided including design examples with calculated and measured results. Features of these devices relative to phase comparators lock indicators voltage-controlled oscillators (VCOs) and filter design are presented.
Linea modelo
Serie: CD74HCT7046A (6)
Clasificación del fabricante
- Semiconductors> Logic> Specialty Logic> Phase-Locked-Loop (PLL)/Oscillator