Datasheet Texas Instruments DAC3282 — Ficha de datos

FabricanteTexas Instruments
SerieDAC3282
Datasheet Texas Instruments DAC3282

Convertidor digital a analógico (DAC) de doble canal, 16 bits, 625-MSPS, 1x-2x interpolado

Hojas de datos

DAC3282 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC) datasheet
PDF, 2.1 Mb, Revisión: C, Archivo publicado: marzo 31, 2015
Extracto del documento

Precios

Estado

DAC3282IRGZRDAC3282IRGZT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

DAC3282IRGZRDAC3282IRGZT
N12
Pin4848
Package TypeRGZRGZ
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY2500250
CarrierLARGE T&RSMALL T&R
Device MarkingDAC3282IDAC3282I
Width (mm)77
Length (mm)77
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsDAC3282IRGZR
DAC3282IRGZR
DAC3282IRGZT
DAC3282IRGZT
ArchitectureCurrent SinkCurrent Sink
DAC Channels22
InterfaceParallel LVDSParallel LVDS
Interpolation1x,2x1x,2x
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)
Power Consumption(Typ), mW950950
RatingCatalogCatalog
Resolution, Bits1616
SFDR, dB8383
Sample / Update Rate, MSPS625625

Plan ecológico

DAC3282IRGZRDAC3282IRGZT
RoHSObedienteObediente

Notas de aplicación

  • Design of Differential Filters for High-Speed Signal Chains (Rev. B)
    PDF, 166 Kb, Revisión: B, Archivo publicado: abr 30, 2010
    Differential filters have many desirable attributes. The task of designing differential filters can seem daunting at first. Single-ended filters designed in any filter design package can be converted to a differential implementation. This application report explores simple conversion techniques for low-pass, high-pass, and band-pass LC filters.
  • DAC348x Device Configuration and Synchronization
    PDF, 317 Kb, Archivo publicado: feb 18, 2013
  • Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs
    PDF, 319 Kb, Archivo publicado: jul 14, 2009
  • Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACs
    PDF, 617 Kb, Archivo publicado: oct 4, 2009
  • Passive Terminations for Current Output DACs
    PDF, 244 Kb, Archivo publicado: nov 10, 2008
    The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the necessary dc bias levels and correct effective impedance load to keep the output voltage within the compliance levels. This ensures that the maximum output signal amplitude and optimum ac performance
  • Q3 2009 Issue Analog Applications Journal
    PDF, 2.1 Mb, Archivo publicado: jul 14, 2009
  • Q4 2009 Issue Analog Applications Journal
    PDF, 1.5 Mb, Archivo publicado: oct 4, 2009
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Linea modelo

Serie: DAC3282 (2)

Clasificación del fabricante

  • Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)