Datasheet Texas Instruments DAC38RF80IAAVR — Ficha de datos

FabricanteTexas Instruments
SerieDAC38RF80
Numero de parteDAC38RF80IAAVR
Datasheet Texas Instruments DAC38RF80IAAVR

Doble canal, 14 bits, 9-GSPS, interpolación 6x-24x, convertidor digital a analógico (DAC) PLL de 6 y 9 GHz 144-FCBGA -40 a 85

Hojas de datos

DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL datasheet
PDF, 3.7 Mb, Revisión: C, Archivo publicado: jul 31, 2017
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin144
Package TypeAAV
Industry STD TermFCBGA
JEDEC CodeS-PBGA-N
Package QTY1000
CarrierLARGE T&R
Device MarkingDAC38RF80I
Width (mm)10
Length (mm)10
Thickness (mm)1.45
Pitch (mm).8
Max Height (mm)1.94
Mechanical DataDescargar

Paramétricos

ArchitectureCurrent Source
DAC Channels2
InterfaceJESD204B
Interpolation6x,8x,10x,12x,16x,18x,20x,24x
Operating Temperature Range-40 to 85 C
Package GroupFCBGA
Package Size: mm2:W x LSee datasheet (FCBGA) PKG
Power Consumption(Typ)3800 mW
RatingCatalog
Resolution14 Bits
SFDR72 dB
Sample / Update Rate9000 MSPS

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: TSW40RF80EVM
    2T2R RF-Sampling Transceiver With Dual 14-Bit 3GSPS ADC, Dual 14-Bit 9GSPS DAC and Clocking Solution
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: DAC38RF80EVM
    DAC38RF80 Dual-Channel, 14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL DAC Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • RF Sampling DAC with 800 MHz of IBW LTE
    PDF, 673 Kb, Archivo publicado: oct 28, 2016
  • Digital RF Power Control for Power Amplifer Protection in Wireless Base
    PDF, 1.4 Mb, Archivo publicado: feb 6, 2017
  • DAC38RF8x Test Modes
    PDF, 3.0 Mb, Archivo publicado: jul 25, 2017
    The DAC38RF8x family of devices comes equipped with multiple test modes to assist users in verifying systems in rapid prototyping situations. This application report covers two of the available tests, the pseudorandom binary-sequence test and JESD204B short pattern test, in detail using the TI DAC38RF8xEVM and TSW14J56EVM capture card.
  • Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer Information
    PDF, 600 Kb, Archivo publicado: agosto 2, 2017
    Input/output Buffer Information Specification (IBIS) models are used to simulate digital electrical interfaces.These models can be categorized into two main categories: traditional and algorithmic modeling interface(AMI). AMI is typically used for SerDes channel simulation, and is different from the traditional IBIS model,which is the focus of this document. These models are simple ASCII tex
  • Eye Scan Testing with the DAC38RFxx
    PDF, 3.6 Mb, Archivo publicado: agosto 10, 2017
    The DAC38RFxx family of devices comes equipped with the capability to generate eye diagrams by usinging JTAG communication with the DAC38RF8x eye scan GUI software. By running this software, users can generate eye diagrams to compare with the JESD204B standard eye mask requirements, and verify signal integrity performance of the SerDes link between DAC and FPGA/ASIC. This application report descri

Linea modelo

Serie: DAC38RF80 (2)

Clasificación del fabricante

  • Semiconductors > Data Converters > Digital-to-Analog Converters (DACs) > High Speed DACs (>10MSPS)