Datasheet Texas Instruments DAC5687-EP — Ficha de datos

FabricanteTexas Instruments
SerieDAC5687-EP
Datasheet Texas Instruments DAC5687-EP

Producto mejorado, doble canal, 16 bits, 500-MSPS, 1x-8x convertidor digital a analógico interpolador

Hojas de datos

16-Bit 500 MSPS 2x-8x Interpolating Dual-Channel DAC datasheet
PDF, 2.2 Mb, Archivo publicado: jun 1, 2006
Extracto del documento

Precios

Estado

DAC5687MPZPEPV62/06650-01XE
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

DAC5687MPZPEPV62/06650-01XE
N12
Pin100100
Package TypePZPPZP
Industry STD TermHTQFPHTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY9090
CarrierJEDEC TRAY (10+1)JEDEC TRAY (10+1)
Device MarkingDAC5687MPZPEPDAC5687MPZPEP
Width (mm)1414
Length (mm)1414
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsDAC5687MPZPEP
DAC5687MPZPEP
V62/06650-01XE
V62/06650-01XE
ArchitectureCurrent SinkCurrent Sink
DAC Channels22
DNL(Max), +/-LSB33
INL(Max), +/-LSB66
InterfaceParallel CMOSParallel CMOS
Operating Temperature Range, C-55 to 125-55 to 125
Output Range Max., mA2020
Output Range Min., mA22
Output TypeCurrentCurrent
Package GroupHTQFPHTQFP
Package Size: mm2:W x L, PKG100HTQFP: 256 mm2: 16 x 16(HTQFP)100HTQFP: 256 mm2: 16 x 16(HTQFP)
Power Consumption(Typ), mW14101410
RatingHiRel Enhanced ProductHiRel Enhanced Product
Reference: TypeIntInt
Resolution, Bits1616
SFDR, dB8080
SNR, dB7575
Sample / Update Rate, MSPS500500
Settling Time, µs0.0120.012

Plan ecológico

DAC5687MPZPEPV62/06650-01XE
RoHSObedienteObediente

Notas de aplicación

  • High Speed Digital-to-Analog Converters Basics (Rev. A)
    PDF, 829 Kb, Revisión: A, Archivo publicado: oct 23, 2012
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Linea modelo

Serie: DAC5687-EP (2)

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Data Converter> Digital to Analog Converters