Datasheet Texas Instruments DAC712 — Ficha de datos

FabricanteTexas Instruments
SerieDAC712
Datasheet Texas Instruments DAC712

Convertidor digital a analógico de 16 bits con interfaz de bus de 16 bits

Hojas de datos

16-Bit Digital-to-Analog Converter With 16-Bit Bus Interface datasheet
PDF, 450 Kb, Revisión: A, Archivo publicado: jul 2, 2009
Extracto del documento

Precios

Estado

DAC712UDAC712UBDAC712UB/1KDAC712UB/1KG4DAC712UBG4DAC712UG4DAC712UKDAC712UK/1KDAC712UK/1KG4DAC712UKG4DAC712ULDAC712UL/1KDAC712UL/1KG4DAC712ULG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNoNoNoNoNoNo

Embalaje

DAC712UDAC712UBDAC712UB/1KDAC712UB/1KG4DAC712UBG4DAC712UG4DAC712UKDAC712UK/1KDAC712UK/1KG4DAC712UKG4DAC712ULDAC712UL/1KDAC712UL/1KG4DAC712ULG4
N1234567891011121314
Pin2828282828282828282828282828
Package TypeDWDWDWDWDWDWDWDWDWDWDWDWDWDW
Industry STD TermSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2020202020202020
CarrierTUBETUBETUBETUBETUBETUBETUBETUBE
Device MarkingDAC712UDAC712UDAC712UDAC712UKDAC712UDAC712UDAC712U
Width (mm)7.57.57.57.57.57.57.57.57.57.57.57.57.57.5
Length (mm)17.917.917.917.917.917.917.917.917.917.917.917.917.917.9
Thickness (mm)2.352.352.352.352.352.352.352.352.352.352.352.352.352.35
Pitch (mm)1.271.271.271.271.271.271.271.271.271.271.271.271.271.27
Max Height (mm)2.652.652.652.652.652.652.652.652.652.652.652.652.652.65
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsDAC712U
DAC712U
DAC712UB
DAC712UB
DAC712UB/1K
DAC712UB/1K
DAC712UB/1KG4
DAC712UB/1KG4
DAC712UBG4
DAC712UBG4
DAC712UG4
DAC712UG4
DAC712UK
DAC712UK
DAC712UK/1K
DAC712UK/1K
DAC712UK/1KG4
DAC712UK/1KG4
DAC712UKG4
DAC712UKG4
DAC712UL
DAC712UL
DAC712UL/1K
DAC712UL/1K
DAC712UL/1KG4
DAC712UL/1KG4
DAC712ULG4
DAC712ULG4
Approx. Price (US$)18.28 | 1ku18.28 | 1ku18.28 | 1ku18.28 | 1ku18.28 | 1ku18.28 | 1ku
ArchitectureR-2RR-2RR-2RR-2RR-2R
Code to Code Glitch(Typ), nV-sec1515151515151515
Code to Code Glitch(Typ)(nV-sec)151515151515
DAC ArchitectureR-2RR-2RR-2RR-2RR-2RR-2RR-2RR-2RR-2R
DAC Channels11111111
DAC: Channels111111
Gain Error(Max), %FSR0.20.20.20.20.20.20.20.2
Gain Error(Max)(%FSR)0.20.20.20.20.20.2
INL(Max), +/-LSB22222222
INL(Max)(+/-LSB)222222
InterfaceParallelParallelParallelParallelParallelParallelParallelParallelParallelParallelParallelParallelParallelParallel
Internal Reference Drift(Max)(ppm/degC)N/AN/AN/AN/AN/AN/A
Offset Error(Max), %N/AN/AN/AN/AN/AN/AN/AN/A
Offset Error(Max)(%)N/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70
Operating Temperature Range(C)-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
Output Range Max., mA/V1010101010101010
Output Range Max.(mA)101010101010
Output Range Min., mA/V-10-10-10-10-10-10-10-10
Output Range Min.(mA)-10-10-10-10-10-10
Output TypeBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered VoltageBuffered Voltage
Package GroupSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOICSOIC
Package Size: mm2:W x L, PKG28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)
Power Consumption(Typ), mW525525525525525525525525
Power Consumption(Typ)(mW)525525525525525525
Priority111111
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference: TypeIntIntIntIntIntIntIntIntIntIntIntIntIntInt
Resolution, Bits1616161616161616
Resolution(Bits)161616161616
Sample / Update Rate, MSPS0.10.10.10.10.10.10.10.1
Sample / Update Rate(MSPS)0.10.10.10.10.10.1
Settling Time, µs1010101010101010
Settling Time(Вµs)101010101010
Special FeaturesOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain CalibrationOn-chip Offset and Gain Calibration
Zero Code Error(Typ), mVN/AN/AN/AN/AN/AN/AN/AN/A
Zero Code Error(Typ)(mV)N/AN/AN/AN/AN/AN/A

Plan ecológico

DAC712UDAC712UBDAC712UB/1KDAC712UB/1KG4DAC712UBG4DAC712UG4DAC712UKDAC712UK/1KDAC712UK/1KG4DAC712UKG4DAC712ULDAC712UL/1KDAC712UL/1KG4DAC712ULG4
RoHSObedienteObedienteDesobedienteDesobedienteObedienteObedienteObedienteDesobedienteDesobedienteObedienteObedienteDesobedienteDesobedienteObediente
Pb gratisNoNoNoNoNoNo

Notas de aplicación

  • Superposition: The Hidden DAC Linearity Error
    PDF, 106 Kb, Archivo publicado: oct 2, 2000
    A digital-to analog converter (DAC) translates digital signals to analog signals. For example, a 12-bit DAC takes a 12-bit binary number, called an input code, and converts it into one of 4,096 analog output voltages or currents. When the contribution to the output voltage or current of each individual bit is independent of any other, it means that the device exhibits no superposition error or tha

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)