Datasheet Texas Instruments LMK04031 — Ficha de datos

FabricanteTexas Instruments
SerieLMK04031
Datasheet Texas Instruments LMK04031

Limpiador de fluctuación de reloj de bajo ruido con PLL en cascada

Hojas de datos

LMK04000 Family Low-Noise Clock Jitter Cleaner with Cascaded PLLs datasheet
PDF, 1.5 Mb, Revisión: J, Archivo publicado: sept 19, 2011
Extracto del documento

Precios

Estado

LMK04031BISQ/NOPBLMK04031BISQE/NOPBLMK04031BISQX/NOPB
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

LMK04031BISQ/NOPBLMK04031BISQE/NOPBLMK04031BISQX/NOPB
N123
Pin484848
Package TypeRHSRHSRHS
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002502500
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingK04031BIK04031BIK04031BI
Width (mm)777
Length (mm)777
Thickness (mm).75.75.75
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / ModelsLMK04031BISQ/NOPB
LMK04031BISQ/NOPB
LMK04031BISQE/NOPB
LMK04031BISQE/NOPB
LMK04031BISQX/NOPB
LMK04031BISQX/NOPB
Number of Inputs222
Number of Outputs666
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Frequency(Max), MHz157015701570
Output Frequency(Min), MHz0.350.350.35
Output Level2VPECL,LVCMOS,LVDS,LVPECL2VPECL,LVCMOS,LVDS,LVPECL2VPECL,LVCMOS,LVDS,LVPECL
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG48WQFN: 49 mm2: 7 x 7(WQFN)48WQFN: 49 mm2: 7 x 7(WQFN)48WQFN: 49 mm2: 7 x 7(WQFN)
RMS Jitter0.1150.1150.115
RatingCatalogCatalogCatalog
Special FeaturesInt. xtal oscillator,Manual/auto switchInt. xtal oscillator,Manual/auto switchInt. xtal oscillator,Manual/auto switch
Supply Voltage(Max), V3.453.453.45
Supply Voltage(Min), V3.153.153.15
VCO Frequency(Max), MHz157015701570
VCO Frequency(Min), MHz143014301430

Plan ecológico

LMK04031BISQ/NOPBLMK04031BISQE/NOPBLMK04031BISQX/NOPB
RoHSObedienteObedienteObediente

Notas de aplicación

  • AN-1950 Silently Powering Low Noise Applications (Rev. A)
    PDF, 10.5 Mb, Revisión: A, Archivo publicado: abr 22, 2013
    This application report explains how to implement a low noise switch mode power supply solution. Itintroduces the sources of noise and explain how to minimize them. A big factor in noise generation andpropagation is the printed circuit board layout. Important basics are discussed. Circuit measurementtechniques are also explained to guide a design engineer towards a low noise but efficient so
  • AN-1910 LMK04000 Family Phase Noise Characterization (Rev. A)
    PDF, 5.1 Mb, Revisión: A, Archivo publicado: abr 26, 2013
    The purpose of this applications report is to present phase noise and jitter measurements representing the clock outputs of the LMK04000 family of Precision Clock Conditioners, when paired with various voltage controlled oscillators (VCXOs). The intent is to illustrate the relationship between clock output phase noise and VCXO phase noise.
  • AN-1939 Crystal Based Oscillator Design with the LMK04000 Family (Rev. A)
    PDF, 8.2 Mb, Revisión: A, Archivo publicado: abr 26, 2013
    This application report for the LMK04000 family of clock conditioners covers the design of an external oscillator circuit using a crystal resonator.

Linea modelo

Clasificación del fabricante

  • Semiconductors> Clock and Timing> Clock Jitter Cleaners> Dual / Cascaded PLL