Datasheet Texas Instruments LMK04616ZCRT — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | LMK04616 |
| Numero de parte | LMK04616ZCRT |
Limpiador de fluctuación de reloj compatible con JESD204B de ultra bajo ruido y baja potencia 144-NFBGA -40 a 85
Hojas de datos
LMK04616 Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs datasheet
PDF, 1.8 Mb, Revisión: A, Archivo publicado: jun 22, 2017
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 144 |
| Package Type | ZCR |
| Industry STD Term | NFBGA |
| JEDEC Code | S-PBGA-N |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Device Marking | LMK04616 |
| Width (mm) | 10 |
| Length (mm) | 10 |
| Thickness (mm) | .95 |
| Pitch (mm) | .8 |
| Max Height (mm) | 1.5 |
| Mechanical Data | Descargar |
Paramétricos
| Number of Inputs | 4 |
| Number of Outputs | 16 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 2000 MHz |
| Output Frequency(Min) | 0.03 MHz |
| Output Level | HCSL,HSDS,LVDS,LVPECL |
| Package Group | NFBGA |
| Package Size: mm2:W x L | 144NFBGA: 100 mm2: 10 x 10(NFBGA) PKG |
| RMS Jitter | 0.065 |
| Rating | Catalog |
| Special Features | 105C PCB temp,Holdover mode,JESD204B SYSREF Generation,Manual and automatic switching between inputs,SPI |
| Supply Voltage(Max) | 3.465 V |
| Supply Voltage(Min) | 1.7 V |
| VCO Frequency(Max) | 6200 MHz |
| VCO Frequency(Min) | 5800 MHz |
Plan ecológico
| RoHS | Obediente |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: LMK04616EVM
LMK04616 Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- SDPLL for LMK046xx FamilyPDF, 4.2 Mb, Archivo publicado: mayo 15, 2017
PLLsusedin the LMK046xxfamilyof devicesare basedon Semi-digitalPLL architecture.LMK04610andLMK04616deviceshavetwo fullyintegratedPLLs.The first PLL,calledPLL1here,usesan externalVCXOas its voltage-controlledoscillator.It is a verylow-bandwidthPLL and the loopbandwidthis <300Hz. Sucha low bandwidthhelpsthe jitter cleaningfor a dirt - LMK0461x Phase Noise Performance With DC-DC Converters (Rev. B)PDF, 2.6 Mb, Revisión: B, Archivo publicado: jul 20, 2017
The LMK0461xdevicefamilyis the industry’s highestperformancewith lowestpowerjittercleanerfamilywith dualPLLscalledPLL1and PLL2.PLL1is a verylow bandwidthPLL that usesan externalVCXOasvoltagecontroloscillator.PLL2is a high bandwidthPLL with an integratedhigh performanceLC oscillator.LMK04610provides10 differentialoutputsand the L - Clocking for Medical Ultrasound SystemsPDF, 1.8 Mb, Archivo publicado: sept 20, 2017
Linea modelo
Serie: LMK04616 (2)
- LMK04616ZCRR LMK04616ZCRT
Clasificación del fabricante
- Semiconductors > Clock and Timing > Clock Jitter Cleaners > Dual / Cascaded PLL