Datasheet Texas Instruments LMK04805 — Ficha de datos

FabricanteTexas Instruments
SerieLMK04805
Datasheet Texas Instruments LMK04805

Limpiador de jitter de reloj de bajo nivel de ruido con PLL en cascada dobles y VCO integrado de 2.2 GHz

Hojas de datos

LMK0480x Low-Noise Clock Jitter Cleaner with Dual Loop PLLs datasheet
PDF, 2.1 Mb, Revisión: K, Archivo publicado: dic 24, 2014
Extracto del documento

Precios

Estado

LMK04805BISQ/NOPBLMK04805BISQE/NOPBLMK04805BISQX/NOPB
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

LMK04805BISQ/NOPBLMK04805BISQE/NOPBLMK04805BISQX/NOPB
N123
Pin646464
Package TypeNKDNKDNKD
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002502000
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingK04805BISQK04805BISQK04805BISQ
Width (mm)999
Length (mm)999
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / ModelsLMK04805BISQ/NOPB
LMK04805BISQ/NOPB
LMK04805BISQE/NOPB
LMK04805BISQE/NOPB
LMK04805BISQX/NOPB
LMK04805BISQX/NOPB
Number of Inputs222
Number of Outputs141414
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Frequency(Max), MHz237023702370
Output Frequency(Min), MHz0.220.220.22
Output LevelLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECL
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG64WQFN: 81 mm2: 9 x 9(WQFN)64WQFN: 81 mm2: 9 x 9(WQFN)64WQFN: 81 mm2: 9 x 9(WQFN)
RMS Jitter0.1110.1110.111
RatingCatalogCatalogCatalog
Special FeaturesHoldover mode,Int. xtal oscillator,Manual/auto switch,SPI,uWireHoldover mode,Int. xtal oscillator,Manual/auto switch,SPI,uWireHoldover mode,Int. xtal oscillator,Manual/auto switch,SPI,uWire
Supply Voltage(Max), V3.453.453.45
Supply Voltage(Min), V3.153.153.15
VCO Frequency(Max), MHz237023702370
VCO Frequency(Min), MHz214821482148

Plan ecológico

LMK04805BISQ/NOPBLMK04805BISQE/NOPBLMK04805BISQX/NOPB
RoHSObedienteObedienteObediente

Notas de aplicación

  • Using the LMK0480x/LMK04906 for Hitless Switching and Holdover
    PDF, 3.8 Mb, Archivo publicado: jul 12, 2013
    This application report discusses some of the key performance results when using LMK0480x/LMK04906to implement hitless switching between reference clocks. Hitless Switching is required in certainapplications such as SONET/SDH/line port cards and routers/switchers in order to minimize thepropagation of phase transients to the clock outputs during reference clock switching. On loss of all vali

Linea modelo

Clasificación del fabricante

  • Semiconductors> Clock and Timing> Clock Jitter Cleaners> Dual / Cascaded PLL