Datasheet Texas Instruments SN74ABT3612 — Ficha de datos

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  Quad Flatpack No-Lead Logic Packages (Rev. D)
  PDF, 1.0 Mb, Revisión: D, Archivo publicado: feb 16, 2004
  Texas Instruments (TI) Quad Flatpack No-lead (QFN) 14/16/20-terminal Pb-free plastic packages meet dimensions specified in JEDEC standard MO-241 allow for board miniaturization and hold several advantages over traditional SOIC SSOP TSSOP and TVSOP packages. The packages are physically smaller have a smaller routing area improved thermal performance and improved electrical parasitics while
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  Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)
  PDF, 528 Kb, Revisión: B, Archivo publicado: jun 1, 1997
  The purpose of this document is to assist the designers of high-performance digital logic systems in using the advanced BiCMOS technology (ABT) logic family. Detailed electrical characteristics of these bus-interface devices are provided and tables and graphs have been included to compare specific parameters of the ABT family with those of other logic families. In addition typical data is provide
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  Parity-Generate/Check Features For High-Bandwidth-Computing FIFO Applications (Rev. A)
  PDF, 52 Kb, Revisión: A, Archivo publicado: marzo 1, 1996
  The SN74ABT3613 and SN74ABT3614 FIFOs contain the parity-generate and parity-check features needed for high-bandwidth and high-speed computing applications where demanding data integrity levels are required. This document discusses these features of the 36-bit FIFOs that are designed for fault-tolerant systems such as those found in computing and telecommunication systems.
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  Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)
  PDF, 115 Kb, Revisión: A, Archivo publicado: marzo 1, 1997
  Advanced bus-interface logic (ABIL) products processed in submicron advanced BiCMOS technologies (ABT) address the specific end-equipment demands of workstations personal and portable computers and telecommunications markets. This document discusses ABIL as system bus interfaces the merits of ABT its I/O structure packaging and ABT products for end-equipment specific solutions.
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  Understanding Advanced Bus-Interface Products Design Guide
  PDF, 253 Kb, Archivo publicado: mayo 1, 1996
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  Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)
  PDF, 80 Kb, Revisión: A, Archivo publicado: dic 1, 1996
  This document shows the output skew for the ABT16254 ABT16952 and ABT16500A devices of the TI advanced BiCMOS (ABT) family. The data samples show which output skew is being examined where the data originates and how it is analyzed. Some errors present in the data are discussed. Skew curves at varying temperatures are given for the ABT16240 ABT16245 ABT16952 ABT16500A and ABT16249 devic
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  Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
  PDF, 209 Kb, Archivo publicado: mayo 10, 2002
  Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
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  Power-Dissipation Calculations for TI FIFO Products (Rev. A)
  PDF, 106 Kb, Revisión: A, Archivo publicado: marzo 1, 1996
  Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36
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  FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (Rev. A)
  PDF, 65 Kb, Revisión: A, Archivo publicado: marzo 1, 1996
  The TI 32- and 36-bit FIFOs contain mailbox-bypass registers that transmit priority from one FIFO port to the other, port A to B or port B to A with out storing the data in the FIFO SRAM buffer. This document describes the FIFO mailbox-bypass registers and shows an example of direct memory access (DMA) control of a digital signal processor (DSP). The components described are the SN74ACT3641 and th

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• Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers